Freescale Semiconductor, Inc.
5.7.3.13 EXCEPTION-RELATED INSTRUCTIONS AND OPERATIONS. The exception-
related instructions and operations table indicates the number of clock periods needed for
the processor to perform the specified exception-related actions. No additional tables are
needed to calculate total effective execution time for these instructions. The total number
of clock cycles is outside the parentheses. The numbers inside parentheses (r/p/w) are
included in the total clock cycle number. All timing data assumes two-clock reads and
writes.
Instruction
BKPT (Acknowledged)
Head
0
Tail
0
Cycles
14(1/0/0)
35(3/2/4)
10(1/0/0)
42(3/2/6)
30(3/2/4)
518(0/1/0)
12(0/1/0)
25(0/3/1)
36(2/2/6)
36(2/2/6)
29(2/2/4)
25(2/2/4)
25(2/2/4)
25(2/2/4)
31(2/3/4)
3(0/1/0)
BKPT (Bus Error)
Breakpoint (Acknowledged)
Breakpoint (Bus Error)
Interrupt
0
−2
0
0
0
−2
−2
0
0
RESET
0
STOP
2
0
LPSTOP
3
−2
−2
−2
−2
−2
−2
−2
−2
1
Divide-by-Zero
0
Trace
0
TRAP #
4
ILLEGAL
0
A-line
0
F-line (First word illegal)
F-line (Second word illegal) ea = Rn
F-line (Second word illegal) ea ≠ Rn (Save)
F-line (Second word illegal) ea ≠ Rn (Op)
Privileged
0
1
1
4
−2
−2
−2
0
29(2/2/4)
25(2/2/4)
38(2/2/6)
4(0/1/0)
0
TRAPcc (trap)
2
TRAPcc (no trap)
TRAPcc.W (trap)
TRAPcc.W (no trap)
TRAPcc.L (trap)
TRAPcc.L (no trap)
TRAPV (trap)
2
2
−2
0
38(2/2/6)
4(0/2/0)
0
0
−2
0
38(2/2/6)
6(0/3/0)
0
2
−2
0
38(2/2/6)
4(0/1/0)
TRAPV (no trap)
2
= Minimum interrupt acknowledge cycle time is assumed to be three clocks.
NOTE: The F-line (second word illegal) operation involves a save step which other
operations do not have. To calculate the total operation time, calculate the save, the
calculate EA, and the operation execution times, and combine in the order
listed, using the equations given in 5.7.1.6 Instruction Execution Time
Calculation.
5-112
MC68340 USER’S MANUAL
MOTOROLA
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