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68HC912DG128PV8 参数 Datasheet PDF下载

68HC912DG128PV8图片预览
型号: 68HC912DG128PV8
PDF下载: 下载PDF文件 查看货源
内容描述: M68HC12微控制器 [M68HC12 Microcontrollers]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 452 页 / 3509 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
MSCAN Controller  
Programmer’s Model of Message Storage  
17.12.4 Data Segment Registers (DSRn)  
The eight data segment registers contain the data to be transmitted or  
being received. The number of bytes to be transmitted or being received  
is determined by the data length code in the corresponding DLR.  
17.12.5 Transmit Buffer Priority Registers (TBPR)  
BIT 7  
PRIO7  
-
BIT 6  
PRIO6  
-
BIT 5  
PRIO5  
-
BIT 4  
PRIO4  
-
BIT 3  
PRIO3  
-
BIT 2  
PRIO2  
-
BIT 1  
PRIO1  
-
BIT 0  
PRIO0  
-
TBPR(1)  
$01xD  
R
W
RESET  
1. x is 5, 6, or 7 depending on which buffer Tx0, Tx1, or Tx2 respectively.  
PRIO7 – PRIO0 — Local Priority  
This field defines the local priority of the associated message buffer.  
The local priority is used for the internal prioritisation process of the  
msCAN12 and is defined to be highest for the smallest binary number.  
The msCAN12 implements the following internal prioritisation  
mechanism:  
• All transmission buffers with a cleared TXE flag participate in the  
prioritisation immediately before the SOF (Start of Frame) is sent.  
• The transmission buffer with the lowest local priority field wins the  
prioritisation.  
• In cases of more than one buffer having the same lowest priority,  
the message buffer with the lower index number wins.  
NOTE: To ensure data integrity, no registers of the transmit buffers shall be  
written while the associated TXE flag is cleared.  
To ensure data integrity, no registers of the receive buffer shall be read  
while the RXF flag is cleared.  
MC68HC912DG128 — Rev 3.0  
Technical Data  
MSCAN Controller  
For More Information On This Product,  
Go to: www.freescale.com  
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