Freescale Semiconductor, Inc.
MSCAN Controller
Programmer’s Model of Message Storage
Figure 17-11. Message Buffer Organization
Address
Register name
(1)
01x0
01x1
01x2
01x3
01x4
01x5
01x6
01x7
01x8
01x9
01xA
01xB
01xC
Identifier register 0
Identifier register 1
Identifier register 2
Identifier register 3
Data segment register 0
Data segment register 1
Data segment register 2
Data segment register 3
Data segment register 4
Data segment register 5
Data segment register 6
Data segment register 7
Data length register
Transmit buffer priority register(2)
01xD
01xE
01xF
Unused
Unused
1. x is 4, 5, 6, or 7 depending on which buffer RxFG,
Tx0, Tx1, or Tx2 respectively.
2. Not applicable for receive buffers
17.12.1 Message Buffer Outline
Figure 17-12 shows the common 13 byte data structure of receive and
transmit buffers for extended identifiers. The mapping of standard
identifiers into the IDR registers is shown in Figure 17-13. All bits of the
13 byte data structure are undefined out of reset.
NOTE: The foreground receive buffer can be read anytime but cannot be
written. The transmit buffers can be read or written anytime.
MC68HC912DG128 — Rev 3.0
Technical Data
MSCAN Controller
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