Freescale Semiconductor, Inc.
MSCAN Controller
msCAN12
CPU bus
RxBG
RXF
RxFG
TXE
Tx0
Tx1
Tx2
PRIO
TXE
PRIO
TXE
PRIO
Figure 17-2. User Model for Message Buffer Organization
When the msCAN12 module is transmitting, the msCAN12 receives its
own messages into the background receive buffer, RxBG, but does NOT
overwrite RxFG, generate a receive interrupt or acknowledge its own
messages on the CAN bus. The exception to this rule is in loop-back
mode (see msCAN12 Module Control Register 0 (CMCR0)) where the
msCAN12 treats its own messages exactly like all other incoming
messages. The msCAN12 receives its own transmitted messages in the
event that it loses arbitration. If arbitration is lost, the msCAN12 must be
prepared to become receiver.
Technical Data
MC68HC912DG128 — Rev 3.0
MSCAN Controller
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