Freescale Semiconductor, Inc.
Enhanced Capture Timer
÷1, 2, ..., 128
16-bit Free-running
16 BIT MAIN TIMER
16-bit load register
Prescaler
M clock
main timer
÷ 1, 4, 8, 16
16-bit modulus
down counter
Prescaler
M clock
RESET
0
Comparator
PT0
Pin logic
Pin logic
Pin logic
Pin logic
Pin logic
TC0 capture/compare register
PAC0
Delay counter
EDG0
EDG1
EDG2
EDG3
0
TC0H hold register
PA0H hold register
A
RESET
0
Comparator
PT1
PT2
PT3
TC1 capture/compare register
PAC1
Delay counter
Delay counter
Delay counter
TC1H hold register
PA1H hold register
RESET
0
Comparator
TC2 capture/compare register
PAC2
TC2H hold register
PA2H hold register
RESET
0
Comparator
TC3 capture/compare register
PAC3
TC3H hold register
PA3H hold register
Comparator
LATQ, BUFEN
(queue mode)
PT4
PT5
EDG4
EDG0
TC4 capture/compare register
MUX
MUX
Read TC3H
hold register
Comparator
Pin logic
Pin logic
Pin logic
EDG5
EDG1
TC5 capture/compare register
Read TC2H
hold register
Comparator
PT6
PT7
EDG6
EDG2
TC6 capture/compare register
MUX
MUX
Read TC1H
hold register
Comparator
Read TC0H
hold register
EDG7
EDG3
TC7 capture/compare register
Figure 13-2. Timer Block Diagram in Queue Mode
Technical Data
MC68HC912DG128 — Rev 3.0
Enhanced Capture Timer
For More Information On This Product,
Go to: www.freescale.com
FREESCALE [ Freescale ]
