Freescale Semiconductor, Inc.
Pulse Width Modulator
12.4 PWM Boundary Cases
The boundary conditions for the PWM channel duty registers and the
PWM channel period registers cause these results:
Table 12-2. PWM Left-Aligned Boundary Conditions
PWDTYx
PWPERx
>$00
>$00
–
PPOLx
Output
Low
$FF
1
0
1
0
1
0
$FF
High
High
Low
≥PWPERx
≥PWPERx
–
–
–
$00
High
Low
$00
Table 12-3. PWM Center-Aligned Boundary Conditions
PWDTYx
PWPERx
>$00
>$00
–
PPOLx
Output
Low
$00
1
0
1
0
1
0
$00
High
High
Low
≥PWPERx
≥PWPERx
–
–
–
$00
High
Low
$00
Technical Data
MC68HC912DG128 — Rev 3.0
Pulse Width Modulator
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