Freescale Semiconductor, Inc.
EEPROM Memory
When test mode is not enabled and unless BULKP is set, erasure is
by byte, aligned word, row or bulk.
EELAT — EEPROM Latch Control
0 = EEPROM set up for normal reads.
1 = EEPROM address and data bus latches set up for
programming or erasing.
Read anytime. Write anytime if EEPGM = 0.
BYTE, ROW, ERASE and EELAT bits can be written simultaneously
or in any sequence.
EEPGM — Program and Erase Enable
0 = Disables program/erase voltage to EEPROM.
1 = Applies program/erase voltage to EEPROM.
The EEPGM bit can be set only after EELAT has been set. When
EELAT and EEPGM are set simultaneously, EEPGM remains clear
but EELAT is set.
The BULKP, BYTE, ROW, ERASE and EELAT bits cannot be
changed when EEPGM is set. To complete a program or erase, two
successive writes to clear EEPGM and EELAT bits are required
before reading the programmed data. A write to an EEPROM location
has no effect when EEPGM is set. Latched address and data cannot
be modified during program or erase.
A program or erase operation should follow the sequence below:
1. Write BYTE, ROW and ERASE to the desired value, write EELAT
= 1
2. Write a byte or an aligned word to an EEPROM address
3. Write EEPGM = 1
4. Wait for programming (tPROG) or erase (terase) delay time
5. Write EEPGM = 0
6. Write EELAT = 0
It is possible to program/erase more bytes or words without intermediate
EEPROM reads, by jumping from step 5 to step 2.
Technical Data
MC68HC912DG128 — Rev 3.0
EEPROM Memory
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