Freescale Semiconductor, Inc.
FLASH 2TS Memory
4.11.3 ERARNGE Routine
Name:
Purpose:
ERARNGE
Erase a range of addresses in FLASH memory
Entry conditions:
H:X
Contains an address in the range to be erased; range size
specified by control byte
CTLBYTE Contains the erase block size in bits 5 and 6 (see Table 4-5)
DERASE Contains the erase delay time in µs/24
CPUSPD CPU frequency times 4 in MHz
Table 4-5. CTLBYTE-Erase Block Size
Bit 6
Bit 5
Block Size
Full array
0
0
1
1
0
1
0
1
One half array
Eight rows: 64 pages
Single row: 8 pages
Exit conditions:
I bit
Set, masking interrupts.
This routine erases the block of FLASH defined by H:X and CTLBYTE.
The algorithm defined in 4.6 FLASH 2TS Erase Operation is used.
Preserves the contents of H:X (address passed)
Advance Information
56
MC68HC908RFRK2
FLASH 2TS Memory
MOTOROLA
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