Freescale Semiconductor, Inc.
FLASH 2TS Memory
Embedded Function Descriptions
4.11.4 REDPROG Routine
Name:
REDPROG
Purpose:
This routine will use a range of multiple rows in the FLASH array to
emulate increased write/erase cycling capability of one row.
Entry conditions:
H:X
Contains the address of the first row in the range. This
address must be the first address of a row (multiple of eight
bytes)
LADDR
DATA
Address of last row in the range; must be the first address
of a row (multiple of eight bytes)
Data to program in the row (bit 7 of DATA + 0 is used
internally and will be overwritten). Routine will always use
eight bytes starting at DATA.
BUMPS
Contains the maximum allowable number of programming
bumps to use
CPUSPD Contains the bus frequency times 4 in MHz
DERASE Contains the erase delay time in µs/24
Exit conditions:
C bit
I bit
Set if successful program; cleared otherwise
Set, masking interrupts
This routine uses a range of the FLASH array containing multiple rows
to emulate increased write/erase cycling capability for data storage. The
routine will write data to each row of the FLASH array (in the range
defined) upon subsequent calls. The number of rows is the difference
between the value in H:X and LADDR, divided by 8.
A row is the minimum range that can be programmed with the
REDPROG routine. All rows in the range will be programmed once
before any are programmed again. This approach is taken to ensure that
all rows reach the end of lifetime at approximately the same time.
MC68HC908RFRK2
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FLASH 2TS Memory
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