Freescale Semiconductor, Inc.
FLASH 2TS Memory
FLASH 2TS Block Protection
4.8 FLASH 2TS Block Protection
NOTE: In performing a program or erase operation, the FLASH 2TS block
protect register must be read after setting the PGM or ERASE bit and
before asserting the HVEN bit.
Due to the ability of the on-board charge pump to erase and program the
FLASH 2TS memory in the target application, provision is made for
protecting blocks of memory from unintentional erase or program
operations due to system malfunction. This protection is implemented by
a reserved location in the memory for block protect information. This
block protect register must be read before setting HVEN = 1. When the
block protect register is read, its contents are latched by the FLASH 2TS
control logic. If the address range for an erase or program operation
includes a protected block, the PGM or ERASE bit is cleared which
prevents the HVEN bit in the FLASH 2TS control register from being set
such that no high-voltage operation is allowed in the array.
When the block protect register is erased (all 0s), the entire memory is
accessible for program and erase. When bits within the register are
programmed, they lock blocks of memory address ranges as shown in
4.9 FLASH 2TS Block Protect Register. The block protect register
itself can be erased or programmed only with an external voltage V
HI
present on the IRQ1 pin. The presence of V on the IRQ1 pin also
HI
allows entry into monitor mode out of reset. Therefore, the ability to
change the block protect register is voltage-level dependent and can
occur in either user or monitor modes.
MC68HC908RFRK2
MOTOROLA
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FLASH 2TS Memory
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