Freescale Semiconductor, Inc.
Low-Voltage Inhibit (LVI)
12.3 Features
Features of the LVI module include:
•
Two levels of low-voltage condition are detected:
– Low-voltage detection
– Low-voltage reset
•
User-configurable for stop mode
12.4 Functional Description
Figure 12-1 shows the structure of the LVI module. The LVI module
contains a bandgap reference circuit and two comparators. The LVI
monitors V voltage during normal MCU operation. When enabled, the
DD
LVI module generates a reset when V falls below the V
threshold.
LVR
DD
In addition to forcing a reset condition, the LVI module has a second
circuit dedicated to low-voltage detection. When V falls below V
,
LVS
DD
the output of the low-voltage comparator asserts the LOWV flag in the
LVI status register (LVISR). In applications that require detecting low
batteries, software can monitor by polling the LOWV bit.
V
DD
STOP INSTRUCTION
LVI STOP BIT IN CONFIGURATION REGISTER
LVI PWR BIT IN CONFIGURATION REGISTER
LVIRST BIT IN CONFIGURATION REGISTER
> V = 0
V
WEAK
BATTERY
DETECTOR
DEAD
BATTERY
DETECTOR
RESET
DD
LVR
V
LVITRIP
DD
DIGITAL FILTER
V
≤ V = 1
LVR
DD
CGMXCLK
V
> V = 0
LVS
DD
LOWV
LOWV FLAG
V
≤ V = 1
LVS
DD
Figure 12-1. LVI Module Block Diagram
Advance Information
170
MC68HC908RFRK2
MOTOROLA
Low-Voltage Inhibit (LVI)
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