Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION
13.7 Active Reset Characteristics
8
2
CLoad
Rise Time
0.5 µs
Fall Time
13 ns
Pulse Width
2.4 µs
Pullup
10 K
50 pF
100 pF
250 pF
1.0 µs
20 ns
2.7 µs
10 K
3
2.5 µs
20 ns
2.7 µs
10 K
NOTE: VDD = 4.5 Vdc, VSS = 0 Vdc, TA = 125 °C
4
13.8 A/D Converter Characteristics
5
(VDD = 4.5 Vdc ± 10%, VSS = 0 Vdc, TA = –40 °C to +125 °C, unless otherwise noted)
6
Characteristic
Resolution
Min
Max
Unit
Comments
8
8
Bits
7
Absolute Accuracy
(VDD ≥ VREFH > 4.5)
—
± 1 1/2
LSB
V
Including quantization
8
Conversion Range
VREFH
VSS
VSS
VREFH
VDD
A/D accuracy may decrease proportionately as
REFH is reduced below 4.5
V
9
Input Leakage
AD0, AD1, AD2, AD3
VREFH
—
—
± 1
± 1
µA
µA
10
11
12
13
14
A
Conversion Time
(Includes Sampling Time)
32
32
tAD
*
Monotonicity
Inherent (Within Total Error)
Zero Input Reading
Full-Scale Reading
Sample Time
00
FE
12
01
FF
Hex
Hex
V
in = 0 V
Vin = VREFH
12
tAD*
Input Capacitance
Analog Input Voltage
—
12
pF
V
VSS
VREFH
*tAD = tcyc if clock source equals MCU
16
17
18
19
20
ELECTRICAL SPECIFICATIONS
MC68HC805P18
13-4
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