GENERAL RELEASE SPECIFICATION
August 27, 1998
Batt+
CSCAL
(bit 4 of $0A)
CSEN
(bit 7 of $0A)
CSA
To analog
MUX 6 input
+
x30 (bit 6 of $0A)
R
0.01Ω
SENSE
x10 (bit 5 of $0A)
Gain Adjustment
V
MID
(For internal test)
Batt–
V
SS
CDEN
(bit 3 of $0A)
V
DD
CDET
Interrupt
D
Q
+
–
V
DET
R
Typically –15mV
CDIFR
(bit 1 of $0A)
Port B
I/O
CDIE
Logic
(bit 2 of $0A)
PB2/
CS0
PB3/
CS1
CDEN
(bit 3 of $0A)
CS0 and CS1 pins are not
available for CSA functions
when OSC1 and OSC2 are
used; i.e. external crystal osc.
option is used.
Logic
CSSEL
(bit 3 of $0B)
Figure 13-1. Current Sense Amplifier Block
13.2 CURRENT SENSE INTERRUPT
The CSA can generate an interrupt once it detects a (discharge) current passes
through the current sensing resistor, R . The trip current depends on the
SENSE
value of the sense resistor; it is voltage developed across R
, V
that trips
SENSE DET
the interrupt. V
is set typically at –15mV, with –10mV being the minimum.
DET
13.3 CSA STATUS AND CONTROL REGISTER (CSSCR)
The CSA status and control register is shown in Figure 13-2.
MOTOROLA
13-2
CURRENT SENSE AMPLIFIER
MC68HC05SB7
REV 2.1
FREESCALE [ Freescale ]
