August 27, 1998
GENERAL RELEASE SPECIFICATION
TABLE OF CONTENTS
Section
Page
SECTION 1
GENERAL DESCRIPTION
1.1
1.2
1.3
1.4
1.5
1.6
1.6.1
1.6.2
1.6.3
1.6.4
1.6.5
1.6.6
1.6.7
1.6.8
1.6.9
FEATURES...................................................................................................... 1-1
MASK OPTION ................................................................................................ 1-2
PEPROM FACTORY PREPROGRAMMED OPTIONS ................................... 1-2
MCU STRUCTURE.......................................................................................... 1-2
PIN ASSIGNMENTS........................................................................................ 1-4
FUNCTIONAL PIN DESCRIPTION.................................................................. 1-4
VDD, VSS.................................................................................................... 1-4
OSC1, OSC2 ............................................................................................... 1-4
IRQ/VPP ...................................................................................................... 1-5
RESET......................................................................................................... 1-6
CSA ............................................................................................................. 1-6
TM................................................................................................................ 1-6
VM ............................................................................................................... 1-6
CAP (ADC) .................................................................................................. 1-6
ESV.............................................................................................................. 1-7
1.6.10 PA0-PA7 / PWM0-PWM3, SCL0-SCL1, SDA0-SDA1................................. 1-7
1.6.11 PB1-PB7 / TCAP, CS0-CS1, AN0-AN3....................................................... 1-7
1.6.12 PC4-PC7...................................................................................................... 1-7
SECTION 2
MEMORY
2.1
2.2
2.3
2.4
2.5
MEMORY MAP ................................................................................................ 2-1
INPUT/OUTPUT SECTION.............................................................................. 2-2
INTERRUPT VECTOR MAPPING................................................................... 2-6
ROM................................................................................................................. 2-6
RAM ................................................................................................................. 2-6
SECTION 3
CENTRAL PROCESSING UNIT
3.1
3.2
3.3
3.4
3.5
3.6
3.6.1
3.6.2
3.6.3
3.6.4
3.6.5
REGISTERS .................................................................................................... 3-1
ACCUMULATOR (A)........................................................................................ 3-2
INDEX REGISTER (X)..................................................................................... 3-2
STACK POINTER (SP).................................................................................... 3-2
PROGRAM COUNTER (PC) ........................................................................... 3-2
CONDITION CODE REGISTER (CCR)........................................................... 3-3
Half Carry Bit (H-Bit).................................................................................... 3-3
Interrupt Mask (I-Bit).................................................................................... 3-3
Negative Bit (N-Bit)...................................................................................... 3-3
Zero Bit (Z-Bit) ............................................................................................. 3-3
Carry/Borrow Bit (C-Bit)............................................................................... 3-4
MC68HC05SB7
REV 2.1
MOTOROLA
i
FREESCALE [ Freescale ]
