August 27, 1998
GENERAL RELEASE SPECIFICATION
LIST OF FIGURES
Title
Figure
Page
1-1
1-2
1-3
2-1
2-2
2-3
2-4
2-5
2-6
2-7
3-1
4-1
4-2
4-3
4-4
5-1
5-2
5-3
6-1
6-2
7-1
8-1
8-2
8-3
8-4
9-1
9-2
9-3
9-4
9-5
MC68HC05SB7 Block Diagram ....................................................................... 1-3
MC68HC05SB7 Pin Assignments.................................................................... 1-4
EPO Oscillator Connections............................................................................. 1-5
MC68HC05SB7 Memory Map.......................................................................... 2-1
MC68HC05SB7 I/O Registers.......................................................................... 2-2
MC68HC05SB7 I/O Registers $0000-$000F ................................................... 2-3
MC68HC05SB7 I/O Registers $0010-$001F ................................................... 2-4
MC68HC05SB7 I/O Registers $0020-$002F ................................................... 2-5
COP Register (COPR) ..................................................................................... 2-5
MC68HC05SB7 Interrupt Vector Mapping....................................................... 2-6
MC68HC05 Programming Model..................................................................... 3-1
Interrupt Stacking Order................................................................................... 4-2
Interrupt Flow Chart ......................................................................................... 4-3
External Interrupt Logic.................................................................................... 4-5
IRQ Status and Control Register (ISCR).......................................................... 4-5
Reset Sources.................................................................................................. 5-1
COP Watchdog Register (COPR).................................................................... 5-3
Miscellaneous Control Register (MCR)............................................................ 5-3
STOP and WAIT Flowchart.............................................................................. 6-2
Miscellaneous Control Register (MCR)............................................................ 6-5
Port I/O Circuitry............................................................................................... 7-1
MC68HC05SB7 Input Clock Source ................................................................ 8-1
IRQ Status and Control Register (ISCR).......................................................... 8-2
Miscellaneous Control Register (MCR)............................................................ 8-3
VCO Adjust Register (VAR) ............................................................................. 8-3
Core Timer Block Diagram............................................................................... 9-1
Core Timer Status and Control Register (CTSCR) .......................................... 9-2
Core Timer Counter Register (CTCR).............................................................. 9-3
COP Watchdog Register (COPR).................................................................... 9-4
Miscellaneous Control Register (MCR)............................................................ 9-4
10-1 Programmable Timer Block Diagram............................................................. 10-1
10-2 Programmable Timer Block Diagram............................................................. 10-2
10-3 Programmable Timer Registers (TMRH, TMRL)............................................ 10-3
10-4 Alternate Counter Block Diagram................................................................... 10-4
10-5 Alternate Counter Registers (ACRH, ACRL).................................................. 10-4
10-6 Timer Input Capture Block Diagram............................................................... 10-5
10-7 Miscellaneous Control Register (MCR).......................................................... 10-5
10-8 Analog Control Register (ACR)...................................................................... 10-6
10-9 Input Capture Registers (ICRH, ICRL)........................................................... 10-6
10-10 Timer Output Compare Block Diagram.......................................................... 10-7
10-11 Output Compare Registers (OCRH, OCRL) .................................................. 10-8
10-12 Timer Control Register (TCR) ........................................................................ 10-9
10-13 Timer Status Registers (TSR)...................................................................... 10-10
MC68HC05SB7
REV 2.1
MOTOROLA
vii
FREESCALE [ Freescale ]
