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68HC705JJ7_1 参数 Datasheet PDF下载

68HC705JJ7_1图片预览
型号: 68HC705JJ7_1
PDF下载: 下载PDF文件 查看货源
内容描述: 常规版本规格 [General Release Specification]
分类和应用:
文件页数/大小: 230 页 / 5548 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
General Description  
VDD and VSS Pins  
1.6 VDD a nd VSS Pins  
Power is supplied to the MCU through V and V . V is the positive  
DD  
SS DD  
supply, and V is ground. The MCU operates from a single power  
SS  
supply.  
Very fast signal transitions occur on the MCU pins. The short rise and  
fall times place very high short-duration current demands on the power  
supply. To prevent noise problems, special care should be taken to  
provide good power supply bypassing at the MCU by using bypass  
capacitors with good high-frequency characteristics that are positioned  
as close to the MCU as possible. Bypassing requirements vary,  
depending on how heavily the MCU pins are loaded.  
1.7 OSC1 a nd OSC2 Pins  
The OSC1 and OSC2 pins are the connections for the external pin  
oscillator (EPO). The OSC1 and OSC2 pins can accept the following  
sets of components:  
1. A crystal as shown in Figure 1-3 (a)  
2. A ceramic resonator as shown in Figure 1-3 (a)  
3. An external resistor as shown in Figure 1-3 (b)  
4. An external clock signal as shown in Figure 1-3 (c)  
The selection of the crystal/ceramic resonator or RC oscillator  
configuration is done by product part number selection as described in  
Section 17. Ordering Information.  
The frequency, f , of the EPO or external clock source is divided by two  
osc  
to produce the internal operating frequency, f . An internal 2 MΩ  
OP  
resistor may be selected between OSC1 and OSC2 by the OSCRES bit  
in the mask option register (MOR).  
MC68HC705JJ7/MC68HC705JP7 Rev. 3.0  
General Release Specification  
General Description  
For More Information On This Product,  
Go to: www.freescale.com  
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