Freescale Semiconductor, Inc.
Ge ne ra l De sc rip tion
1.5 Func tiona l Pin De sc rip tion
Refer to Figure 1-2 for the pinouts of the MC68HC705JJ7 and
MC68HC705JP7 in the user mode.
The following paragraphs give a description of the general function of
each pin.
MC68HC705JJ7
PB1/AN1
PB2/AN2
PB0/AN0
VDD
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
PB3/AN3/TCAP
*PB4/AN4/TCMP/CMP1
PB5/SDO
VSS
OSC1
OSC2
RESET
IRQ/VPP
PA0*†
PA1*†
PA2*†
PB6/SDI
PB7/SCK
*PA5
* PA4
†* PA3
MC68HC705JP7
PB1/AN1
PB2/AN2
PB3/AN3/TCAP
*PB4/AN4/TCMP/CMP1
PB5/SDO
* PC4
PB0/AN0
VDD
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
2
VSS
3
OSC1
OSC2
PC3*
4
5
6
*PC5
PC2*
7
* PC6
PC1*
8
*PC7
PC0*
9
PB6/SDI
RESET
IRQ/VPP
PA0*†
PA1*†
PA2*†
10
11
12
13
14
PB7/SCK
*PA5
* PA4
†* PA3
* Denotes 10 mA sink /5 mA source capability
† Denotes IRQ interrupt capability
Figure 1-2. User Mode Pinouts
General Release Specification
MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0
General Description
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