Freescale Semiconductor, Inc.
Core Tim e r
RESET
INTERNAL
CLOCK
$0009
OVERFLOW
CORE TIMER COUNTER REGISTER
÷ 4
÷ 2
OSC1
BITS 0–7 OF 15-STAGE
RIPPLE COUNTER
INTERNAL CLOCK ÷ 1024
CORE TIMER
INTERRUPT
REQUEST
U
A
T
$0008
CORE TIMER STATUS/CONTROL REGISTER
RESET
RTI RATE SELECT
$1FF0
COP REGISTER
÷ 2
÷ 2
÷ 2
÷ 2
÷ 2
÷ 2
÷ 2
÷ 2
÷ 2
÷ 2
÷ 2
POWER-ON
RESET
COP
WATCHDOG
RESET
RESET
Figure 10-1. Core Timer Block Diagram
General Release Specification
MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0
Core Timer
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