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68HC705JJ7_1 参数 Datasheet PDF下载

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型号: 68HC705JJ7_1
PDF下载: 下载PDF文件 查看货源
内容描述: 常规版本规格 [General Release Specification]
分类和应用:
文件页数/大小: 230 页 / 5548 K
品牌: FREESCALE [ Freescale ]
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Freescale Semiconductor, Inc.  
Simple Serial Interface  
SIOP Registers  
9.4.3 SIOP Da ta Re g iste r (SDR)  
The SIOP data register (SDR) is located at address $000C and serves  
as both the transmit and receive data register. Writing to this register will  
initiate a message transmission if the node is in master mode. The SIOP  
subsystem is not double buffered and any write to this register will  
destroy the previous contents. The SDR can be read at any time.  
However, if a transfer is in progress the results may be ambiguous.  
Writing to the SDR while a transfer is in progress can cause invalid data  
to be transmitted and/or received. Figure 9-6 shows the position of each  
bit in the register. This register is not affected by reset.  
$000C  
Read:  
Write:  
Reset:  
Bit 7  
Bit 7  
6
6
5
5
4
4
3
3
2
2
1
1
Bit 0  
Bit 0  
Unaffected by Reset  
Figure 9-6. SIOP Data Register (SDR)  
MC68HC705JJ7/MC68HC705JP7 Rev. 3.0  
General Release Specification  
Simple Serial Interface  
For More Information On This Product,  
Go to: www.freescale.com  
 
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