Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION
SECTION 10
SELF-CHECK MODE
The self-check program resides at mask ROM locations $1F00 to $1FEF. This
program is designed to check the part’s functionality with a minimum of support
hardware. The COP subsystem is disabled in the self-check mode so that
routines that feed the COP do not exist in the self-check program.
The self-check mode is entered on the rising edge of RESET if the IRQ pin is
driven to double the supply voltage and the TCAP/PD7 pin is at logic one. RESET
must be held low for 4064 cycles after POR or for a time t for any other reset.
RL
After reset, the I/O, RAM, ROM, timer, SIOP and Interrupts are tested. Self-check
results (using LED’s as monitors) are shown in Table 10-1. It is not recommended
that the user code use any of the self-check code. The self-check code is subject
to change at any time to improve testability or manufacturability.
Table 10-1. Self-Check Results
PC2
PC1
PC0
REMARKS
0
0
0
1
1
1
0
1
0
1
0
1
0
Bad I/O
1
Bad RAM
1
Bad Timer
Bad ROM
0
0
Bad Serial
Bad Interrupt
Good Device
Bad Device
1
Flashing
All Others
0 indicates LED is on; 1 indicates LED is off.
SELF-CHECK MODE
Rev. 2.0
10-1
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