Peripheral Memory Mapped Registers
Table 4-39 FlexCAN2 Registers Address Map (Continued)
(FC2_BASE = $00 FA00)
FlexCAN2 is NOT available in the 56F8167 device
Register Acronym
FC2MB11_DATA
Address Offset
Register Description
Message Buffer 11 Data Register
$9C
$9D
$9E
FC2MB11_DATA
FC2MB11_DATA
Message Buffer 11 Data Register
Message Buffer 11 Data Register
Reserved
FC2MB12_CONTROL
FC2MB12_ID_HIGH
FC2MB12_ID_LOW
FC2MB12_DATA
FC2MB12_DATA
FC2MB12_DATA
FC2MB12_DATA
$A0
$A1
$A2
$A3
$A4
$A5
$A6
Message Buffer 12 Control / Status Register
Message Buffer 12 ID High Register
Message Buffer 12 ID Low Register
Message Buffer 12 Data Register
Message Buffer 12 Data Register
Message Buffer 12 Data Register
Message Buffer 12 Data Register
Reserved
FC2MB13_CONTROL
FC2MB13_ID_HIGH
FC2MB13_ID_LOW
FC2MB13_DATA
FC2MB13_DATA
FC2MB13_DATA
FC2MB13_DATA
$A8
$A9
$AA
$AB
$AC
$AD
$AE
Message Buffer 13 Control / Status Register
Message Buffer 13 ID High Register
Message Buffer 13 ID Low Register
Message Buffer 13 Data Register
Message Buffer 13 Data Register
Message Buffer 13 Data Register
Message Buffer 13 Data Register
Reserved
FC2MB14_CONTROL
FC2MB14_ID_HIGH
FC2MB14_ID_LOW
FC2MB14_DATA
FC2MB14_DATA
FC2MB14_DATA
FC2MB14_DATA
$B0
$B1
$B2
$B3
$B4
$B5
$B6
Message Buffer 14 Control / Status Register
Message Buffer 14 ID High Register
Message Buffer 14 ID Low Register
Message Buffer 14 Data Register
Message Buffer 14 Data Register
Message Buffer 14 Data Register
Message Buffer 14 Data Register
Reserved
FC2MB15_CONTROL
FC2MB15_ID_HIGH
FC2MB15_ID_LOW
FC2MB15_DATA
$B8
$B9
$BA
$BB
$BC
$BD
Message Buffer 15 Control / Status Register
Message Buffer 15 ID High Register
Message Buffer 15 ID Low Register
Message Buffer 15 Data Register
Message Buffer 15 Data Register
Message Buffer 15 Data Register
FC2MB15_DATA
FC2MB15_DATA
56F8367 Technical Data, Rev. 9
Freescale Semiconductor
Preliminary
79
FREESCALE [ Freescale ]
