56F8367/56F8167 General Description
Note: Features in italics are NOT available in the 56F8167 device.
• Up to 60 MIPS at 60MHz core frequency
• Temperature Sensor
• DSP and MCU functionality in a unified,
C-efficient architecture
• Up to two Quadrature Decoders
• Optional on-chip regulator
• Access up to 4MB of off-chip program and 32MB of
data memory
• Up to two FlexCAN modules
• Two Serial Communication Interfaces (SCIs)
• Up to two Serial Peripheral Interfaces (SPIs)
• Up to four general-purpose Quad Timers
• Computer Operating Properly (COP) / Watchdog
• Chip Select Logic for glueless interface to ROM and
SRAM
• 512KB of Program Flash
• 4KB of Program RAM
• 32KB of Data Flash
• JTAG/Enhanced On-Chip Emulation (OnCE™) for
unobtrusive, real-time debugging
• 32KB of Data RAM
• Up to 76 GPIO lines
• 32KB Boot Flash
• 160-pin LQFP Package and 160 MAPBGA
• Up to two 6-channel PWM modules
• Four 4-channel, 12-bit ADCs
OCR_DIS
* Configuration
shown for on-chip
2.5V regulator
EMI_MODE
RSTO
V
2
V
VDD
VSS VDDA
VSSA
PP
CAP
EXTBOOT
5
RESET
4
7
6
2
6
6
JTAG/
EOnCE
Port
PWM Outputs
Digital Reg
Analog Reg
PWMA
Current Sense Inputs
or GPIOC
3
4
Low Voltage
Supervisor
16-Bit
56800E Core
Fault Inputs
Program Controller
and
Hardware Looping Unit
Address
Generation Unit
Data ALU
Bit
Manipulation
Unit
PWM Outputs
PWMB
16 x 16 + 36 -> 36-Bit MAC
Three 16-bit Input Registers
Four 36-bit Accumulators
3
4
Current Sense Inputs
or GPIOD
Fault Inputs
PAB
PDB
CDBR
CDBW
4
4
AD0
ADCA
AD1
R/W Control
6
2
8
5
Memory
Program Memory
256K x 16 Flash
2K x 16 RAM
A0-5 or GPIOA8-13
A6-7 or GPIOE2-3
VREF
XDB2
XAB1
XAB2
4
4
External
Address Bus
Switch
AD0
AD1
ADCB
A8-15 or GPIOA0-7
4
3
GPIOB0-3 (A16-19)
System Bus
Control
PAB
Boot ROM
16K x 16 Flash
Temp_Sense
GPIOB4 (A20, prescaler_clock)
PDB
Quadrature
Decoder 0 or
Quad
Timer A or
GPIOC
GPIOB5-7 (A21-23, clk0-3**)
CDBR
CDBW
Data Memory
16K x 16 Flash
16K x 16 Flash
7
9
4
D0-6 or GPIOF9-15
D7-15 or GPIOF0-8
WR
External Data
Bus Switch
Quadrature
Decoder 1 or
Quad
Timer B or
SPI1 or
RD
4
GPIOD2-5 or CS4 -7
Bus Control
4
2
PS / CS0 (GPIOD8)
DS / CS1 (GPIOD9)
IPBus Bridge (IPBB)
GPIOC
Quad
Timer C or
GPIOE
Peripheral
Device Selects
GPIOD0 (CS2 or CAN2_TX)
GPIOD1 (CS3 or CAN2_RX)
GPIO or EMI CS or
FlexCAN2
RW
Control
IPAB
IPWDB
IPRDB
Decoding
Peripherals
Quad
Timer D or
GPIOE
4
2
Clock
resets
PLL
FlexCAN
P
O
R
System
Integration
Module
O
SPI0 or
GPIOE
SCI1 or
GPIOD
SCI0 or
GPIOE
COP/
Interrupt
Clock
XTAL
S
Generator
C
Watchdog Controller
EXTAL
**See Table 2-2
for explanation
4
2
2
CLKMODE
IRQA IRQB
CLKO
56F8367/56F8167 Block Diagram
56F8367 Technical Data, Rev. 9
Freescale Semiconductor
Preliminary
3
FREESCALE [ Freescale ]
