Table 11-2 56F8367 -160 MAPBGA Package Identification by Pin Number
Ball
No.
Ball
No.
Ball
No.
Ball
No.
Signal Name
Signal Name
Signal Name
Signal Name
F4
VDD_IO
K11
K7
VSS
N12
N13
PWMA5
A13
B12
ANB5
ANB6
C2
V
PP2
VDD_IO
FAULTA0
D3
B1
D2
CLKO
TXD0
RXD0
N3
P2
M3
PWMB3
PWMB4
PWMB5
P14
N14
M13
D2
A12
B11
J11
ANB7
FAULTA1
FAULTA2
EXTBOOT
VSS
C1
D1
E2
E1
E3
E4
F2
PHASEA1
PHASEB1
INDEX1
HOME1
A1
N4
P3
M4
P4
N5
L4
GPIOB5
GPIOB6
GPIOB7
TXD1
RXD1
WR
L13
M14
L14
L12
L11
K14
K13
D3
A11
C11
D11
B10
A10
D10
E10
ISA0
ISA1
ISA2
TD0
TD1
TD2
TD3
FAULTA3
D4
D5
D6
A2
OCR_DIS
VDDA_OSC_PLL
A3
P5
RD
F1
F3
A4
A5
N6
L5
PS
DS
K12
J12
XTAL
A9
TC0
EXTAL
F11
VDD_IO
G4
K5
VCAP4*
VDD_IO
P6
L6
GPIOD0
GPIOD1
H11
K10
VCAP3*
VDD_IO
B9
D9
TC1
TRST
G1
G3
G2
H1
H2
A6
A7
A8
A9
A10
K6
N7
P7
L7
GPIOD2
GPIOD3
GPIOD4
GPIOD5
ISB0
J13
J14
H12
G13
H13
RSTO
D8
A8
B8
D7
A7
TCK
TMS
TDI
RESET
CLKMODE
ANA0
TDO
N8
ANA1
VPP1
H4
A11
K8
V
CAP1*
G12
ANA2
D6
CAN_TX
CAN_RX
H3
J1
A12
A13
L8
ISB1
ISB2
F13
F12
ANA3
ANA4
B7
E8
P8
VCAP2*
J2
A14
K9
IRQA
H14
ANA5
D5
SS0
* When the on-chip regulator is disabled, these four pins become 2.5V VDD_CORE
.
56F8367 Technical Data, Rev. 9
170
Freescale Semiconductor
Preliminary
FREESCALE [ Freescale ]
