56F8367 Package and Pin-Out Information
Table 11-1 56F8367 160-Pin LQFP Package Identification by Pin Number
Signal
Name
Pin No.
Pin No.
Signal Name
Pin No.
Signal Name
Pin No.
Signal Name
1
2
VDD_IO
41
42
VSS
81
82
PWMA5
121
122
ANB5
ANB6
V
PP2
VDD_IO
FAULTA0
3
4
5
CLKO
TXD0
RXD0
43
44
45
PWMB3
PWMB4
PWMB5
83
84
85
D2
123
124
125
ANB7
EXTBOOT
VSS
FAULTA1
FAULTA2
6
7
PHASEA1
PHASEB1
INDEX1
HOME1
A1
46
47
48
49
50
51
52
GPIOB5
GPIOB6
GPIOB7
TXD1
RXD1
WR
86
87
88
89
90
91
92
D3
FAULTA3
D4
126
127
128
129
130
131
132
ISA0
ISA1
ISA2
TD0
TD1
TD2
TD3
8
9
D5
10
11
12
D6
A2
OCR_DIS
VDDA_OSC_PLL
A3
RD
13
14
A4
A5
53
54
PS
DS
93
94
XTAL
133
134
TC0
EXTAL
VDD_IO
15
16
VCAP4*
VDD_IO
55
56
GPIOD0
GPIOD1
95
96
VCAP3*
VDD_IO
135
136
TC1
TRST
17
18
19
20
21
A6
A7
57
58
59
60
61
GPIOD2
GPIOD3
GPIOD4
GPIOD5
ISB0
97
98
RSTO
RESET
CLKMODE
ANA0
137
138
139
140
141
TCK
TMS
TDI
A8
99
A9
100
101
TDO
A10
ANA1
VPP1
22
A11
62
V
CAP1*
102
ANA2
142
CAN_TX
23
24
A12
A13
63
64
ISB1
ISB2
103
104
ANA3
ANA4
143
144
CAN_RX
VCAP2*
25
A14
65
IRQA
105
ANA5
145
SS0
* When the on-chip regulator is disabled, these four pins become 2.5V VDD_CORE
.
56F8367 Technical Data, Rev. 9
Freescale Semiconductor
Preliminary
167
FREESCALE [ Freescale ]
