Part 11 Packaging
Note: The 160 Map Ball Grid Array is not available in the 56F8167 device.
11.1 56F8367 Package and Pin-Out Information
This section contains package and pin-out information for the 56F8367. This device comes in a 160-pin
Low-profile Quad Flat Pack (LQFP) and 160 Map Ball Grid Array. Figure 11-1 shows the package
lay-out for the 160-pin LQFP, and Figure 11-2 for the160 Map Ball Grid Array. Figure 11-5 shows the
mechanical parameters for the LQFP package and Figure 11-3 for the MAPBGA, Table 11-1 lists the
pin-out for the 160-pin LQFP and Table 11-2 lists the pin-out for the 160 MAPBGA.
Orientation Mark
V
ANB4
DD_IO
V
2
ANB3
ANB2
ANB1
ANB0
PP
CLKO
TXD0
121
Pin 1
RXD0
PHASEA1
V
V
SSA_ADC
PHASEB1
INDEX1
DDA_ADC
V
V
V
V
V
REFH
HOME1
A1
REFP
REFMID
REFN
A2
A3
REFLO
A4
A5
TEMP_SENSE
ANA7
V
4
ANA6
CAP
V
ANA5
DD_IO
A6
ANA4
A7
A8
ANA3
ANA2
A9
ANA1
A10
A11
A12
A13
ANA0
CLKMODE
RESET
RSTO
V
V
A14
A15
DD_IO
3
CAP
V
EXTAL
SS
D7
D8
D9
XTAL
VDDA_OSC_PLL
OCR_DIS
D6
V
DD_IO
D10
D5
GPIOB0
GPIOB1
GPIOB2
GPIOB3
GPIOB4
D4
FAULTA3
D3
FAULTA2
FAULTA1
PWMB0
PWMB1
PWMB2
D2
81
41
FAULTA0
PWMA5
* When the on-chip regulator is disabled, these four pins become 2.5V V
.
DD_CORE
Figure 11-1 Top View, 56F8367 160-Pin LQFP Package
56F8367 Technical Data, Rev. 9
166
Freescale Semiconductor
Preliminary
FREESCALE [ Freescale ]
