56F8167 Package and Pin-Out Information
11.2 56F8167 Package and Pin-Out Information
This section contains package and pin-out information for the 56F8167. This device comes in a 160-pin
Low-profile Quad Flat Pack (LQFP). Figure 11-4 shows the package outline for the 160-pin LQFP,
Figure 11-5 shows the mechanical parameters for this package, and Table 11-3 lists the pin-out for the
160-pin LQFP.
Orientation Mark
V
ANB4
DD_IO
V
2
ANB3
ANB2
ANB1
ANB0
PP
CLKO
TXD0
121
Pin 1
RXD0
SCLK1
V
V
SSA_ADC
MOSI1
MISO1
DDA_ADC
V
V
V
V
V
REFH
SS1
A1
REFP
REFMID
REFN
A2
A3
A4
A5
REFLO
NC
ANA7
ANA6
ANA5
V
V
4*
CAP
DD_IO
A6
ANA4
A7
A8
ANA3
ANA2
A9
ANA1
A10
A11
A12
A13
ANA0
CLKMODE
RESET
RSTO
V
V
A14
A15
DD_IO
3*
CAP
V
EXTAL
SS
D7
D8
D9
XTAL
VDDA_OSC_PLL
OCR_DIS
D6
D5
V
DD_IO
D10
GPIOB0
GPIOB1
GPIOB2
GPIOB3
GPIOB4
D4
NC
D3
NC
NC
PWMB0
PWMB1
PWMB2
D2
NC
NC
81
41
* When the on-chip regulator is disabled, these four pins become 2.5V V
.
DD_CORE
Figure 11-4 Top View, 56F8167 160-Pin LQFP Package
56F8367 Technical Data, Rev. 9
Freescale Semiconductor
Preliminary
173