Table 10-7 Current Consumption per Power Supply Pin (Typical)
On-Chip Regulator Enabled (OCR_DIS = Low)
1
IDD_ADC
IDD_OSC_PLL
Mode
Stop1
Test Conditions
• 8MHz Device Clock
IDD_IO
6mA
0μA
165μA
• All peripheral clocks are off
• ADC powered off
• PLL powered off
• External Clock is off
• All peripheral clocks are off
• ADC powered off
Stop2
5.1mA
0μA
155μA
• PLL powered off
1. No Output Switching
2. Includes Processor Core current supplied by internal voltage regulator
Table 10-8 Current Consumption per Power Supply Pin (Typical)
On-Chip Regulator Disabled (OCR_DIS = High)
1
IDD_Core
IDD_ADC
IDD_OSC_PLL
Mode
Test Conditions
• 60MHz Device Clock
IDD_IO
RUN1_MAC
150mA
13μA
50mA
2.5mA
• All peripheral clocks are enabled
• All peripherals running
• Continuous MAC instructions with
fetches from Data RAM
• ADC powered on and clocked
• 60MHz Device Clock
Wait3
Stop1
86mA
13μA
13μA
70μA
0μA
2.5mA
• All peripheral clocks are enabled
• ADC powered off
• 8MHz Device Clock
• All peripheral clocks are off
• ADC powered off
950μA
165μA
• PLL powered off
• External Clock is off
• All peripheral clocks are off
• ADC powered off
Stop2
100μA
13μA
0μA
155μA
• PLL powered off
1. No Output Switching
Table 10-9. Regulator Parameters
Characteristic
Symbol
Min
Typical
Max
Unit
Unloaded Output Voltage
(0mA Load)
VRNL
2.25
—
2.75
V
56F8367 Technical Data, Rev. 9
144
Freescale Semiconductor
Preliminary
FREESCALE [ Freescale ]
