56F8367 Information
Table 8-3 GPIO External Signals Map (Continued)
Pins in italics are NOT available in the 56F8167 device
Reset
Function
Functional Signal
Package Pin
GPIO Port
GPIO Bit
0
1
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
D7
D8
28
29
2
D9
30
3
D10
D11
D12
D13
D14
D15
D0
32
4
149
150
151
152
153
70
5
6
7
GPIOF
8
9
10
11
12
13
14
15
D1
71
D2
83
D3
86
D4
88
D5
89
D6
90
1. See Part 6.5.8 to determine how to select peripherals from this set
Part 9 Joint Test Action Group (JTAG)
9.1 56F8367 Information
Please contact your Freescale marketing representative or authorized distributor for
device/package-specific BSDL information.
56F8367 Technical Data, Rev. 9
Freescale Semiconductor
Preliminary
137
FREESCALE [ Freescale ]
