Table 8-2 56F8167 GPIO Ports Configuration (Continued)
Available
Pins in
56F8167
GPIO
Port
Port
Width
Peripheral Function
Reset Function
SCI0
EMI Address
SPI0
TMRC
GPIO
E
14
14
16
2 pins - SCI0
2 pins - EMI Address pins
4 pins - SPI0
2 pins - TMRC
4 pins - Dedicated GPIO
16 pins - EMI Data
F
16
EMI Data
Table 8-3 GPIO External Signals Map
Pins in italics are NOT available in the 56F8167 device
Reset
Function
Functional Signal
Package Pin
GPIO Port
GPIO Bit
0
1
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
A8
A9
19
20
21
22
23
24
25
26
154
10
11
12
13
14
2
A10
A11
A12
A13
A14
A15
A0
3
4
5
6
GPIOA
7
8
9
A1
10
11
12
13
A2
A3
A4
A5
56F8367 Technical Data, Rev. 9
134
Freescale Semiconductor
Preliminary
FREESCALE [ Freescale ]
