Peripheral Memory Mapped Registers
Table 4-38 FlexCAN Registers Address Map (Continued)
(FC_BASE = $00 F800)
FlexCAN is NOT available in the 56F8145 device
Register Acronym
Address Offset
Register Description
FCMB5_CONTROL
FCMB5_ID_HIGH
FCMB5_ID_LOW
FCMB5_DATA
$68
$69
$6A
$6B
$6C
$6D
$6E
Message Buffer 5 Control / Status Register
Message Buffer 5 ID High Register
Message Buffer 5 ID Low Register
Message Buffer 5 Data Register
Message Buffer 5 Data Register
Message Buffer 5 Data Register
Message Buffer 5 Data Register
Reserved
FCMB5_DATA
FCMB5_DATA
FCMB5_DATA
FCMB6_CONTROL
FCMB6_ID_HIGH
FCMB6_ID_LOW
FCMB6_DATA
$70
$71
$72
$73
$74
$75
$76
Message Buffer 6 Control / Status Register
Message Buffer 6 ID High Register
Message Buffer 6 ID Low Register
Message Buffer 6 Data Register
Message Buffer 6 Data Register
Message Buffer 6 Data Register
Message Buffer 6 Data Register
Reserved
FCMB6_DATA
FCMB6_DATA
FCMB6_DATA
FCMB7_CONTROL
FCMB7_ID_HIGH
FCMB7_ID_LOW
FCMB7_DATA
$78
$79
$7A
$7B
$7C
$7D
$7E
Message Buffer 7 Control / Status Register
Message Buffer 7 ID High Register
Message Buffer 7 ID Low Register
Message Buffer 7 Data Register
Message Buffer 7 Data Register
Message Buffer 7 Data Register
Message Buffer 7 Data Register
Reserved
FCMB7_DATA
FCMB7_DATA
FCMB7_DATA
FCMB8_CONTROL
FCMB8_ID_HIGH
FCMB8_ID_LOW
FCMB8_DATA
$80
$81
$82
$83
Message Buffer 8 Control / Status Register
Message Buffer 8 ID High Register
Message Buffer 8 ID Low Register
Message Buffer 8 Data Register
56F8345 Technical Data, Rev. 17
Freescale Semiconductor
Preliminary
71
FREESCALE [ Freescale ]
