Electrical Design Considerations
Table 14-1 Legacy and Revised Acronyms (Continued)
Peripheral Reference
Manual
Memory
Address
Data Sheet
Processor Expert
Acronym
Register Name
New
Legacy
New
Acronym
Legacy
Acronym
Start
End
Acronym
Acronym
I/O Short Address
Location High
Register
N/A
N/A
SIM_ISALH
SIM_ISALH
SIM_ISALH
SIM_ISALL
0xF110
I/O Short Address
N/A
N/A
SIM_ISALL
SIM_ISALL
0xF111
Location Low Register
Protection Register
N/A
N/A
N/A
N/A
SIM_PROT
SIM_PROT
SIM_PROT
0xF112
0xF113
GPIOA Peripheral
Select 0 Register
SIM_GPISA0
SIM_GPISA0
SIM_GPISA0
GPIOA Peripheral
Select 0 Register
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
SIM_GPSA1
SIM_GPSB0
SIM_GPSB1
SIM_GPSCD
SIM_GPSA1
SIM_GPSB0
SIM_GPSB1
SIM_GPSCD
SIM_GPSA1
SIM_GPSB0
SIM_GPSB1
SIM_GPSCD
0xF114
0xF115
0xF116
0xF117
GPIOB Peripheral
Select 0 Register
GPIOB Peripheral
Select 1 Register
GPIO Perip. Select
Register for GPIO C &
D
Internal Peripheral.
Select Register for
PWM
N/A
N/A
N/A
N/A
N/A
N/A
SIM_ISPWM
SIM_IPSDAC
SIM_ISPWM
SIM_IPSDAC
SIM_IPSTMRA
SIM_ISPWM
SIM_IPSDAC
SIM_IPSTMRA
0xF118
0xF119
0xF11A
Internal Peripheral
Select Register for
DAC
Internal Peripheral
Select Register for
TMRA
SIM_IPSTMRA
56F8036 Data Sheet, Rev. 6
Freescale Semiconductor
163