2.2 Power and Ground Signals
Table 2-2 Power Inputs
No. of Pins
Signal Name
VDD
Signal Description
4
Power—These pins provide power to the internal structures of the chip, and should all be
attached to VDD.
1
VDDA
Analog Power—This pin is a dedicated power pin for the analog portion of the chip and
should be connected to a low noise 3.3V supply.
Table 2-3 Grounds
No. of Pins
Signal Name
VSS
Signal Description
4
GND—These pins provide grounding for the internal structures of the chip, and should all
be attached to VSS.
1
1
VSSA
TCS
Analog Ground—This pin supplies an analog ground.
TCS—This Schmitt pin is reserved for factory use and must be tied to VSS for normal use.
In block diagrams, this pin is considered an additional VSS.
Table 2-4 Supply Capacitors and VPP
No.of
Pins
Signal
Name
Signal
Type
State
Signal Description
During Reset
2
VCAPC Supply
Supply
VCAPC—Connect each pin to a 2.2 μFor greater bypass capacitor in order
to bypass the core logic voltage regulator (required for proper chip
operation). For more information, refer to Section 5.2.
2.3 Clock and Phase Locked Loop Signals
Table 2-5 PLL and Clock
No. of
Pins
Signal
Name
Signal
Type
State
During Reset
Signal Description
1
EXTAL
Input
Input
External Crystal Oscillator Input—This input should be connected to an
8MHz external crystal or ceramic resonator. For more information, please
refer to Section 3.5.
GPIOB2
Input/
Output
Input
Port B GPIO—This multiplexed pin is a General Purpose I/O (GPIO) pin that
can be programmed as an input or output pin. This I/O can be utilized when
using the on-chip relaxation oscillator so the EXTAL pin is not needed.
56F801 Technical Data, Rev. 17
10
Freescale Semiconductor