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56F801_1 参数 Datasheet PDF下载

56F801_1图片预览
型号: 56F801_1
PDF下载: 下载PDF文件 查看货源
内容描述: 16位数字信号控制器 [16-bit Digital Signal Controllers]
分类和应用: 控制器
文件页数/大小: 48 页 / 536 K
品牌: FREESCALE [ Freescale ]
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Serial Communications Interface (SCI) Signals  
2.7 Serial Communications Interface (SCI) Signals  
Table 2-9 Serial Communications Interface (SCI0) Signals  
No. of  
Pins  
Signal  
Name  
Signal  
Type  
State During  
Reset  
Signal Description  
1
TXD0  
Output  
Input  
Input  
Transmit Data (TXD0)—SCI0 transmit data output  
GPIOB0  
Input/Output  
Port B GPIO—This pin is a General Purpose I/O (GPIO) pin that  
can be individually programmed as an input or output pin.  
After reset, the default state is SCI output.  
1
RXD0  
Input  
Input  
Input  
Receive Data (RXD0)—SCI0 receive data input  
GPIOB1  
Input/Output  
Port B GPIO—This pin is a General Purpose I/O (GPIO) pin that  
can be individually programmed as an input or output pin.  
After reset, the default state is SCI input.  
2.8 Analog-to-Digital Converter (ADC) Signals  
Table 2-10 Analog to Digital Converter Signals  
No. of  
Pins  
Signal  
Name  
Signal  
Type  
State During  
Reset  
Signal Description  
4
4
1
ANA0-3  
ANA4-7  
VREF  
Input  
Input  
Input  
Input  
Input  
Input  
ANA0-3—Analog inputs to ADC, channel 1  
ANA4-7—Analog inputs to ADC, channel 2  
VREF—Analog reference voltage for ADC. Must be set to  
VDDA-0.3V for optimal performance.  
2.9 Quad Timer Module Signals  
Table 2-11 Quad Timer Module Signals  
No. of  
Pins  
Signal  
Name  
State During  
Signal Type  
Signal Description  
Reset  
3
TD0-2  
Input/Output  
Input/Output  
Input  
TD0-2—Timer D Channel 0-2  
GPIOA0-2  
Input  
Port A GPIO—This pin is a General Purpose I/O (GPIO) pin that  
can be individually programmed as an input or output pin.  
After reset, the default state is the quad timer input.  
56F801 Technical Data, Rev. 17  
Freescale Semiconductor  
13  
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