FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
processor decision to either shutoff or not, in the mean time
the control loop will try to fix itself.
The OV/UV fault flag is masked during DVS until
DVSSTAT flag is asserted “Done”.
To avoid erroneous conditions, a 20 μs filter will be
implemented.
To keep the RST output low during ramp up and until the
soft start is done, the OV/UV protection is masked from
reporting that the output is in regulation.
LOGIC COMMANDS AND REGISTERS
2
I C USER INTERFACE
The 34704 communicates via I2C using a default device
address $54 to access all user registers and program all
regulators features independently. Physical address is in a 7-
bit format. The extra bit to complete the 8-bit indicates the
reading or writing mode as shown in Figure 7 and Figure 8.
After each byte read or sent, the MC34704 answers with an
Acknowledge bit, indicating the bite was transferred
successfully.
7 bit Physical Address +
(w) bit
Sub-Address
ACK
0
ACK
0
Data
ACK
0
(MSB=0)
1010100 + 0
0XXXXXXX
XXXXXXXX
ACK
ACK
Start Bit
ACK End Bit
1 0 1 0 1 0 0 0
0 0 0 0 0 0 1
0
0 0 0 0 1 1 1 1
Figure 7. Writing sequence I2C bit stream
Sub-address
(MSB=1)
7 bit Physical ADD +
(w) bit
Physical
ADD + (r) bit
Data Read
XXXXXXX
ACK
0
ACK RS
ACK
0
ACK
1
1010100 + 0
1XXXXXXX
0
1
1010100 + 1
Start Bit
ACK
ACK
ACK
ACK End Bit
1
0
1 0
1
0 0
1
0 0
0
0 0
0
1
0 1
0
1 0
0
0 0 0 1 1 1 1 1
RS
Figure 8. Reading sequence I2C bit stream
and tied with REG6 and REG7 in a preset power sequence.
By default, only REG6 and REG7 are involved in the power
sequence and REG5 is independently controlled with GrpE.
USER PROGRAMMABLE REGISTERS
GrpC/E power sequencing setting (34704A Only)
34704A assigns 2 bits to program the GrpC/E power
sequencing options (CCDSEQ[1:0]). These bits value is
latched in at GrpC power up and will not be allowed to change
unless a power recycle happens.
The microprocessor can choose one of several voltage
sequence options for the GrpC/E supply (REG5), high
voltage supply (REG6), and negative voltage supply (REG7).
For 3 of the sequencing options, REG5 supply is controlled
OPTION
MSB
LSB
GRPC/E ENABLED
GRPC/E DISABLED
1
0
0
REG5 is independently controlled
REG5 is independently controlled
(Default)
REG6 and REG7 ramp up together.
REG6 and REG7 ramp down together
34704
Analog Integrated Circuit Device Data
Freescale Semiconductor
31
FREESCALE [ Freescale ]
