FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
• Do nothing until the second time period expires and let
the device power off by itself
The ONOFF pin is edge sensitive and activates on a falling
edge. It is normally pulled high.
Shutdown Flag Asserted
Shutdown if No Processor Communication
st
nd
1
Period
2
Period
1
0
Programmable
Programmable
Shutdown Delay
Shutdown Delay
st
st
1
Period
2 Period
Turn On
During this time, the processor can abort the shutdown
process or shutdown immediately before the 2nd period
elapses with an I2C command
ON/OFF Pin can be released during this
period without affecting the device response process
Figure 6. Hardware Power Up/Down Timing
a 10 ms current limit timer starts. The switcher will stay in
this mode of operation until one of the following occurs:
RST OUTPUT SIGNAL PIN
This is a power reset output signal. It is an open drain
output that should be connected to the reset input of the
microprocessor. An external pull up resistor should be
connected to this output and is recommended to be pulled up
to V2 for best performance (If this pin is pulled up to the VIN
pin, then the 1.0 µA shutdown current budget is not
guaranteed)
• The current is reduced back to the normal level inside
the 10 ms timer and in this case normal operation is
gained back
• The output reaches the thermal shutdown limit and
turns off
At power up, the RST pin is asserted (low) to keep the
processor in “reset”. When VG, REG2, REG3, and REG4 are
all in regulation (both OV and UV flags for each regulator are
de-asserted) and no faults exist, the RST output is de-
asserted after a 10 ms delay to take the processor out of
reset. Then the processor can go through its own internal
power up sequence and can start communicating to the rest
of the system.
• The current limit timer expires without gaining normal
operation at which point the output turns off. Then only
for GrpB, at the end of a timeout period of 10 ms, the
output will attempt to restart again but for one time only.
• The output current keeps increasing until it reaches the
second over-current limit, see below for more details
If ANY of the above four regulators has any of the following
faults: over-temperature, short-circuit, over-current for more
than 10 ms, over-voltage in response A, under-voltage in
response A, or is shutting down normally, the RST output is
asserted to put the processor back in reset. If ANY of the
above four regulators has an over-voltage response B fault or
an under-voltage response B fault, the RST output will not be
asserted (only the OV and UV flags will be available for the
microprocessor to read).
• A hard over-current limit (short circuit limit) that is higher
than the cycle by cycle limit at which the device reacts by
shutting down the output immediately. This is necessary to
prevent damage in case of a short-circuit. After that, only
GrpB will attempt a one time retry after a timeout period of
10ms and will go through a new soft start cycle
OUTPUT OVER-VOLTAGE/UNDER-VOLTAGE
MONITORING
In the case of an output over-voltage/under-voltage, the
user has two options that can be programmed through the
I2C interface:
THERMAL LIMIT DETECTION
There is a thermal sensor for each regulator except REG7.
It uses an external MOSFET.
Response A: The output will switch off automatically and
the 34704 would alert the processor through I2C that such an
event happened.
CURRENT LIMIT MONITORING
The current limit circuitry has two levels of current limiting:
Response B: The output will not switch off. Rather the
34704 communicates to the processor that an over-voltage/
under-voltage condition has occurred and wait for the
• A soft over-current limit (over-current limit): If the peak
current reaches the typical over-current limit, the switcher
will start a cycle-by-cycle operation to limit the current and
34704
Analog Integrated Circuit Device Data
Freescale Semiconductor
30
FREESCALE [ Freescale ]
