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33910_10 参数 Datasheet PDF下载

33910_10图片预览
型号: 33910_10
PDF下载: 下载PDF文件 查看货源
内容描述: LIN系统基础芯片,高 [LIN System Basis Chip with High]
分类和应用:
文件页数/大小: 90 页 / 1134 K
品牌: FREESCALE [ Freescale ]
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MC33910BAC / MC34910BAC  
FUNCTIONAL DEVICE OPERATIONS  
OPERATIONAL MODES  
voltage monitoring will issue a VDDOT Flag independently of  
the VDD voltage.  
In order to select and activate the cyclic sense wake-up  
from the L1 input, before entering in low power modes (Stop  
or Sleep modes), the following SPI set-up has to be  
performed:  
Window Watchdog Overflow  
• In WUCR: select the L1 input to WU-enable.  
• In HSCR: enable HSx.  
• In TIMCR: select the CS/WD bit and determine the  
cyclic sense period with CYSTx bits.  
If the watchdog counter is not properly serviced while its  
window is open, the 33910 will detect a MCU software  
runaway and will reset the microcontroller.  
Wake-up From Sleep Mode  
• Perform Goto Sleep/Stop command.  
During Sleep mode, the 5.0 V regulator is not active,  
hence all wake-up requests from Sleep mode require a  
power-up/reset sequence.  
Forced Wake-up  
The 33910 can wake-up automatically after a  
predetermined time spent in Sleep or Stop mode. Cyclic  
sense and forced wake-up are exclusive. If forced wake-up is  
enabled, the cyclic sense can not be enabled.  
External Reset  
The 33910 has a bidirectional reset pin which drives the  
device to a safe state (same as Reset mode) for as long as  
this pin is held low. The RST pin must be held low long  
enough to pass the internal glitch filter and get recognized by  
the internal reset circuit. This functionality is also active in  
Stop mode.  
To determine the wake-up period, the following SPI set-up  
has to be sent before entering in Low Power modes:  
• In TIMCR: select the CS/WD bit and determine the Low  
Power mode period with CYSTx bits.  
• In HSCR: the HSx bit must be disabled.  
After the RST pin is released, there is no extra tRST to be  
considered.  
CS Wake-up  
While in Stop mode, a rising edge on the CS will cause a  
wake-up. The CS wake-up does not generate an interrupt  
and is not reported on SPI.  
WAKE-UP CAPABILITIES  
Once entered in to one of the low-power modes (Sleep or  
Stop) only wake-up sources can bring the device into Normal  
mode operation.  
LIN Wake-up  
In Stop mode, a wake-up is signaled to the MCU as an  
interrupt, while in Sleep mode the wake-up is performed by  
activating the 5.0 V regulator and resetting the MCU. In both  
cases the MCU can detect the wake-up source by accessing  
the SPI registers. There is no specific SPI register bit to signal  
a CS wake-up or external reset. If necessary this condition is  
detected by excluding all other possible wake-up sources.  
While in the low power modes the 33910 monitors the  
activity on the LIN bus. A dominant pulse larger than tPROPWL  
followed by a dominant to recessive transition will cause a  
LIN wake-up. This behavior protects the system from a short-  
to-ground bus condition.  
RST Wake-up  
While in Stop mode, the 33910 can wake-up when the  
RST pin is held low long enough to pass the internal glitch  
filter. Then, the 33910 will change to Normal Request or  
Normal modes depending on the WDCONF pin  
configuration. The RST wake-up does not generate an  
interrupt and is not reported via SPI.  
Wake-up From Wake-up Input (L1) With Cyclic Sense  
Disabled  
The wake-up line is dedicated to sense state changes of  
external switches and wake-up the MCU (in Sleep or Stop  
mode).  
In order to select and activate direct wake-up from the L1  
input, the wake-up control register (WUCR) must be  
configured with L1WE input enabled. The wake-up input  
state is read through the wake-up status register (WUSR).  
From Stop mode, the following wake-up events can be  
configured:  
• Wake-up from L1 input without cyclic sense  
• Cyclic sense wake-up inputs  
• Force wake-up  
L1 input is also used to perform cyclic-sense wake-up.  
Note: Selecting the L1 input in the analog multiplexer  
before entering Low Power mode will disable the wake-up  
capability of the L1 input.  
• CS wake-up  
• LIN wake-up  
• RST wake-up  
From Sleep mode, the following wake-up events can be  
configured:  
Wake-up From Wake-up Input (L1) With Cyclic Sense  
Timer Enabled  
• Wake-up from L1 input without cyclic sense  
• Cyclic sense wake-up inputs  
• Force wake-up  
The SBCLIN can wake-up at the end of a cyclic sense  
period if on the wake-up input lines (L1) a state change  
occurs. The HSx switch is activated in Sleep or Stop modes  
from an internal timer. Cyclic sense and force wake-up are  
exclusive. If cyclic sense is enabled, the force wake-up can  
not be enabled.  
• LIN wake-up  
33910  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
72  
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