欢迎访问ic37.com |
会员登录 免费注册
发布采购

33910_10 参数 Datasheet PDF下载

33910_10图片预览
型号: 33910_10
PDF下载: 下载PDF文件 查看货源
内容描述: LIN系统基础芯片,高 [LIN System Basis Chip with High]
分类和应用:
文件页数/大小: 90 页 / 1134 K
品牌: FREESCALE [ Freescale ]
 浏览型号33910_10的Datasheet PDF文件第72页浏览型号33910_10的Datasheet PDF文件第73页浏览型号33910_10的Datasheet PDF文件第74页浏览型号33910_10的Datasheet PDF文件第75页浏览型号33910_10的Datasheet PDF文件第77页浏览型号33910_10的Datasheet PDF文件第78页浏览型号33910_10的Datasheet PDF文件第79页浏览型号33910_10的Datasheet PDF文件第80页  
MC33910BAC / MC34910BAC  
FUNCTIONAL DEVICE OPERATIONS  
OPERATIONAL MODES  
Over-current Shutdown (LIN Interrupt)  
If the bit LINM is set in the interrupt mask register (IMR) an  
interrupt IRQ will be generated.  
The output low side FET is protected against over-current  
conditions. In case of an over-current condition (e.g. LIN bus  
short to VBAT), the transmitter will not be shut down. The bit  
LINOC in the LIN status register (LINSR) is set.  
The transmitter is automatically re-enabled once TXD is  
high.  
A read of the LIN status register (LINSR) with the TXD pin  
is high will clear the bit TXDOM.  
If the bit LINM is set in the interrupt mask register (IMR) an  
Interrupt IRQ will be generated.  
LIN Dominant Voltage Level Selection  
Over-temperature Shutdown (LIN Interrupt)  
The LIN dominant voltage level can be selected by the bit  
LDVS in the LIN control register (LINCR).  
The output low side FET is protected against over-  
temperature conditions. In case of an over-temperature  
condition, the transmitter will be shut down and the bit LINOT  
in the LIN status register (LINSR) is set.  
LIN Receiver Operation Only  
While in Normal mode the activation of the RXONLY bit  
disables the LIN TX driver. In the case of a LIN error condition  
this bit is automatically set. In case a Low Power mode is  
selected with this bit set, the LIN wake-up functionality is  
disabled, then, in Stop mode, the RXD pin will reflect the state  
of the LIN bus.  
If the bit LINM is set in the interrupt mask register (IMR) an  
Interrupt IRQ will be generated.  
The transmitter is automatically re-enabled once the  
condition is gone and TXD is high.  
A read of the LIN status register (LINSR) with the TXD pin  
will re-enable the transmitter.  
STOP Mode And Wake-up Feature  
During Stop mode operation the transmitter of the physical  
layer is disabled. In case the bit LIN-PU was set in the Stop  
mode sequence the internal pull-up resistor is disconnected  
from VSUP and a small current source keeps the LIN pin in  
the recessive state. The receiver is still active and able to  
detect wake-up events on the LIN bus line.  
RXD Short-circuit Detection (LIN Interrupt)  
The LIN transceiver has a short-circuit detection for the  
RXD output pin. In case of an short-circuit condition, either  
5.0 V or ground, the bit RXSHORT in the LIN status register  
(LINSR) is set and the transmitter is shutdown.  
If the bit LINM is set in the interrupt mask register (IMR) an  
interrupt IRQ will be generated.  
A dominant level longer than tPROPWL followed by a rising  
edge will generate a wake-up interrupt and will be reported in  
the ISR. Also see Figure 32.  
The transmitter is automatically re-enabled once the  
condition is gone (transition on RXD) and TXD is high.  
A read of the LIN status register (LINSR) without the RXD  
pin short circuit condition will clear the bit RXSHORT.  
SLEEP Mode And Wake-up Feature  
During Sleep mode operation the transmitter of the  
physical layer is disabled. In case the bit LIN-PU was set in  
the Sleep mode sequence the internal pull-up resistor is  
disconnected from VSUP and a small current source keeps  
the LIN pin in recessive state. The receiver is still active to be  
able to detect wake-up events on the LIN bus line.  
TXD Dominant Detection (LIN Interrupt)  
The LIN transceiver monitors the TXD input pin to detect  
stuck in dominant (0 V) condition. In case of a stuck condition  
(TXD pin 0V for more than 1 second (typ.)) the transmitter is  
shut down and the bit TXDOM in the LIN status register  
(LINSR) is set.  
A dominant level longer than tPROPWL followed by a rising  
edge will generate a system wake-up (Reset) and will be  
reported in the ISR. Also see Figure 31.  
33910  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
76  
 复制成功!