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13892_11 参数 Datasheet PDF下载

13892_11图片预览
型号: 13892_11
PDF下载: 下载PDF文件 查看货源
内容描述: 电源管理和用户接口IC [Power Management and User Interface IC]
分类和应用:
文件页数/大小: 156 页 / 5573 K
品牌: FREESCALE [ Freescale ]
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FUNCTIONAL DEVICE OPERATION  
SUPPLIES  
5V Boost Efficiency  
(Vin = 3.6V, Vout = 5V)  
100.00  
95.00  
90.00  
85.00  
80.00  
0
100  
200  
300  
Boost Load Current (mA)  
Figure 24. Boost Switcher Efficiency  
LINEAR REGULATORS  
This section describes the linear regulators provided. For convenience, these regulators are named to indicate their typical or  
possible applications, but the supplies are not limited to these uses and may be applied to any loads within the specified regulator  
capabilities.  
A low power standby mode controlled by STANDBY is provided in which the bias current is aggressively reduced. This mode  
is useful for deep sleep operation where certain supplies cannot be disabled, but active regulation can be tolerated with lesser  
parametric requirements. The output drive capability and performance are limited in this mode. Refer to STANDBY Event  
Definition and Control in Power Control System for more details.  
Some dedicated regulators are covered in their related chapters rather than in the Supplies chapter (i.e., the VUSB and VUSB2  
supplies are included in Connectivity).  
Apart from the integrated linear regulators, there are also GPO output pins provided to enable and disable discrete regulators  
or functional blocks, or to use as a general purpose output for any system need. For example, one application may be to enable  
a battery pack thermistor bias in synchronization with timed ADC conversions.  
All regulators use the main bandgap as the reference. The main bandgap is bypassed with a capacitor at REFCORE. The  
bandgap and the rest of the core circuitry is supplied from VCORE. The performance of the regulators is directly dependent on  
the performance of VCOREDIG and the bandgap. No external DC loading is allowed on VCOREDIG or REFCORE. VCOREDIG  
is kept powered as long as there is a valid supply and/or coin cell. Table 53 captures the main characteristics of the core circuitry.  
Table 53. Core Specifications  
Reference  
Parameter  
Target  
Output voltage in ON mode (61),(62)  
Output voltage in Off mode(62)  
Bypass Capacitor  
1.5 V  
1.2 V  
VCOREDIG (Digital core supply)  
2.2 μF typ (0.65 μF derated)  
Output voltage in ON mode (61),(62)  
Output voltage in Off mode (62)  
Bypass Capacitor  
2.775 V  
0 V  
VCORE (Analog core supply)  
2.2 μF typ (0.65 μF derated)  
Output voltage (61)  
1.20 V  
Absolute Accuracy  
Temperature Drift  
0.50%  
0.25%  
REFCORE (Bandgap / Regulator Reference)  
Bypass Capacitor  
100 nF typ (65 nF derated)  
Notes  
61. 3.0 V < BP < 4.65 V, no external loading on VCOREDIG, VCORE, or REFCORE. Extended operation down to UVDET, but no system  
malfunction.  
62. The core is in On mode when charging or when the state machine of the IC is not in the Off mode nor in the power cut mode. Otherwise,  
the core is in Off mode.  
13892  
Analog Integrated Circuit Device Data  
Freescale Semiconductor  
82  
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