FUNCTIONAL DEVICE OPERATION
SUPPLIES
While in SID mode, programmable stops are used to set limits on how far up and how far down a SID-controlled buck switcher
will be allowed to step. The SWxSIDMIN[3:0] and SWxSIDMAX[3:0] bits can be used to ensure that voltage stepping is confined
to within the acceptable bounds for a given process technology used for the BB IC.
To contain all of the SWx voltage setting bits in single banks, the SWxSIDMIN[3:0] word is shortened to 4 bits, but should be
decoded by logic to have an implied leading 0 (i.e., MSB = 0, but is not included in the programmable word). For instance,
SW1SIDMIN = 1000 (default value) should be decoded as 01000, which corresponds to 0.800 V (assuming SW1HI = 0).
Likewise, the SWxSIDMAX[3:0] word is shortened to 4 bits, but should be decoded by logic to have an implied leading 1
(MSB = 1, but is not included in the programmable word). For instance, SW1SIDMAX = 1010 (default value) should be decoded
as 11010, which corresponds to 1.250 V (again, assuming SW1HI = 0).
A new SPI write for the active switcher output value with SWx[4:0] should take immediate effect, and this becomes the new
baseline from which succeeding SID steps are referenced. The SWxDVS[4:0] value is not considered during SID mode. The
system only uses the SWx[4:0] bits and the min/max stops SWxSIDMIN[3:0] and SWxSIDMAX[3:0].
When in SID mode, a STANDBY = 1 event (pin states of STANDBY and STANDBYSEC) will have the “immediate” effect (after
any STBYDLY delay has timed out) of changing the set point and mode to those defined for Standby operation. Exiting Standby
puts the system back to the normal mode set point with no stored SID adjustments -- the system will recalibrate itself again from
the refreshed baseline.
BOOST SWITCHER
SWBST is a boost switching regulator with a fixed 5.0 V output. It runs at 2/3 of the switcher PLL frequency. SWBST supplies
the VUSB regulator for the USB system in OTG mode, and it also supplies the power for the RGB LED's. When SWBST is
configured to supply the VBUS pin in OTG mode, the feedback will be switched to sense the UVBUS pin instead of the SWBSTFB
pin. Therefore, when driving the VBUS for OTG mode the output of the switcher may rise to 5.75 V to compensate for the voltage
drops on the internal switches. Note that the parasitic leakage path for a boost switcher will cause the output voltage SWBSTOUT
and SWBSTFB to sit at a Schottky drop below the battery voltage whenever SWBST is disabled. The switching NMOS transistor
is integrated on-chip. An external fly back Schottky diode, inductor and capacitor are required.
Figure 23. Boost Switcher Architecture
Enabling of SWBST is accomplished through the SWBSTEN SPI control bit.
Table 52. Switch Mode Supply SWBST Control Function Summary
Parameter
SWBSTEN
Value
Function
SWBST OFF
SWBST ON
0
1
13892
Analog Integrated Circuit Device Data
Freescale Semiconductor
81