FUNCTIONAL DEVICE OPERATION
SUPPLIES
REGULATORS GENERAL CHARACTERISTICS
The following applies to all linear regulators unless otherwise specified.
• Specifications are for an ambient temperature of -40 to +85 °C.
• Advised bypass capacitor is the Murata™ GRM155R60G225ME15 which comes in a 0402 case.
• In general, parametric performance specifications assume the use of low ESR X5R ceramic capacitors with 20% accuracy
and 15% temperature spread, for a worst case stack up of 35% from the nominal value. Use of other types with wider
temperature variation may require a larger room temperature nominal capacitance value to meet performance specs over
temperature. In addition, capacitor derating as a function of DC bias voltage requires special attention. Finally, minimum
bypass capacitor guidelines are provided for stability and transient performance. Larger values may be applied; performance
metrics may be altered and generally improved, but should be confirmed in system applications.
• Regulators which require a minimum output capacitor ESR (those with external PNPs) can avoid an external resistor if ESR
is assured with capacitor specifications, or board level trace resistance.
• The output voltage tolerance specified for each of the linear regulators include process variation, temperature range, static
line regulation, and static load regulation.
• The PSRR of the regulators is measured with the perturbed signal at the input of the regulator. The power management IC is
supplied separately from the input of the regulator and does not contain the perturbed signal. During measurements care must
be taken not to reach the drop out of the regulator under test.
• In the Low Power mode the output performance is degraded. Only those parameters listed in the Low Power mode section
are guaranteed. In this mode, the output current is limited to much lower currents than in the Active mode.
• Regulator performance is degraded in the extended input voltage range. This means that the supply still behaves as a
regulator and will try to hold up the output voltage by turning the pass device fully on. As a result, the bias current will increase
and all performance parameters will be heavily degraded, such as PSRR and load regulation.
• Note that in some cases, the minimum operating range specifications may be conflicting due to numerous set point and biasing
options, as well as the potential to run BP into one of the software or hardware shutdown thresholds. The specifications are
general guidelines which should be interpreted with some care.
• When a regulator gets disabled, the output will be pulled towards ground by an internal pull-down. The pull-down is also
activated when RESETB goes low.
• 32 kHz spur levels are specified for fully loaded conditions.
• Short-circuit protection (SCP) is included on certain LDOs (see the SCP section later in this chapter). Exceeding the SCP
threshold will disable the regulator and generate a system interrupt. The output voltage will not sag below the specified voltage
for the rated current being drawn. For the lower current LDOs without SCP, they are less accessible to the user environment
and essentially self-limiting.
• The power tree of a given application must be scrubbed for critical use cases to ensure consistency and robustness in the
power strategy.
TRANSIENT RESPONSE WAVEFORMS
The transient load and line response are specified with the waveforms as depicted in Figure 25. Note that the transient load
response refers to the overshoot only, excluding the DC shift itself. The transient line response refers to the sum of both overshoot
and DC shift. This is also valid for the mode transition response.
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Analog Integrated Circuit Device Data
Freescale Semiconductor
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