FUNCTIONAL DEVICE OPERATION
I2C INTERFACE
Table 12. Interrupt, Mask and Sense Bits
DebounceTi
me
Interrupt
Mask
Sense
Purpose
Trigger
Section
Low battery warning
Sense is 1 if above LOBATH
threshold.
LOBATHI
LOBATHM
LOBATHS
Dual
30 μs
page 55
L2H: 20-
24 ms
H2L: 8-
12 ms
VBUSVALIDI
VBUSVALIDM
VBUSVALIDS
Detects A-Session Valid on VBUS Dual
page 110
ID floating detect. Sense is 1 if
Dual
IDFLOATI
IDGNDI
IDFLOATM
IDGNDM
IDFLOATS
IDGNDS
90 μs
90 μs
90 μs
page 110
page 110
page 110
above threshold
USB ID ground detect. Sense is 1
if not to ground
Dual
ID voltage for Factory mode detect
Dual
IDFACTORYI
IDFACTORYM
IDFACTORYS
Sense is 1 if above threshold
Wall charger detect
Regulator short-circuit protection
tripped
Dual
L2H
1.0 ms
200 μs
CHRGSE1BI
CHRGSE1BM
CHRSE1BS
page 88
Short circuit protection trip
detection
SCPI
SCPS
-
L2H
0
page 71
BATTDETBI
1HZI
BATTDETBM
1HZM
BATTDETBS
Battery removal detect
1.0 Hz time tick
Dual
L2H
L2H
H2L
L2H
H2L
L2H
H2L
L2H
30 ms
0
page 99
page 50
page 50
page 55
page 55
page 55
page 55
page 55
page 55
-
-
TODAI
TODAM
Time of day alarm
0
30 ms (1)
30 ms
30 ms (35)
30 ms
30 ms (35)
30 ms
PWRON1 event
Sense is 1 if pin is high.
PWRON1I
PWRON2I
PWRON3I
SYSRSTI
PWRON1M
PWRON2M
PWRON3M
SYSRSTM
PWRON1S
PWRON2S
PWRON3S
-
PWRON2 event
Sense is 1 if pin is high.
PWRON3 event
Sense is 1 if pin is high.
System reset through PWRONx
pins
L2H
0
page 55
WDIRESETI
PCI
WDIRESETM
PCM
-
-
WDI silent system restart
Power cut event
L2H
L2H
L2H
L2H
0
0
0
0
page 55
page 55
page 55
page 55
WARMI
WARMM
Warm Start event
MEMHLDI
MEMHLDM
Memory Hold event
Clock source change
Sense is 1 if source is XTAL
CLKI
CLKM
CLKS
Dual
L2H
Dual
0
page 50
page 50
page 71
RTC reset or intrusion has
occurred
RTCRSTI
THWARNHI
RTCRSTM
THWARNHM
-
0
Thermal warning higher threshold
Sense is 1 if above threshold
THWARNHS
30 ms
Thermal warning lower threshold
Sense is 1 if above threshold
THWARNLI
LPBI
THWARNLM
LPBM
THWARNLS
LPBS
Dual
Dual
30 ms
page 71
page 88
Low power boot interrupt
1.0 ms
Notes
35. Debounce timing for the falling edge can be extended with PWRONxDBNC[1:0]; refer to Power Control System for details.
Additional sense bits are available to reflect the state of the power up mode selection pins, as summarized in Table 13.
13892
Analog Integrated Circuit Device Data
Freescale Semiconductor
48
FREESCALE [ Freescale ]
