FUNCTIONAL DEVICE OPERATION
CLOCK GENERATION AND REAL TIME CLOCK
CLOCK GENERATION AND REAL TIME CLOCK
CLOCK GENERATION
The 13892 generates a 32.768 kHz clock as well as several 32.768 kHz derivative clocks that are used internally for control.
Support is also provided for an external Secure Real Time Clock (SRTC) which may be integrated on a companion system
processor IC. For media protection in compliance with Digital Rights Management (DRM) system requirements, the
CLK32KMCU can be provided as a reference to the SRTC module where tamper protection is implemented.
CLOCKING SCHEME
The 13892 contains an internal 32 kHz oscillator, that delivers a 32 kHz nominal frequency (20%) at its outputs when an
external 32.768 kHz crystal is not present.
If a 32.768 kHz crystal is present and running, then all control functions will run off the crystal derived 32 kHz oscillator. In
absence of a valid supply at the BP supply node (for instance due to a dead battery), the crystal oscillator continues running,
supplied from the coin cell battery until the coin cell is depleted.
The 32 kHz clock is driven to two output pins, CLK32KMCU (intended as the CKIL input to the system processor) is referenced
to VSRTC, and CLK32K (provided as a clock reference for the peripherals) is referenced to SPIVCC. The driver is enabled by
the startup sequencer, and CLK32KMCU is programmable for Low Power Off mode, controlled by the state machine.
Additionally, a SPI bit CLK32KMCUEN bit is provided for direct SPI control. The CLK32KMCUEN bit defaults to a 1 and resets
on RTCPORB, to ensure the buffer is activated at the first power up and configured as desired for subsequent power ups.
CLK32K is restricted to state machine activation in normal On mode.
The drive strength of the CLK32K output drivers are programmable with CLK32KDRV[1:0] (master control bits that affect the
drive strength of CLK32K).
During a switchover between the two clock sources (such as when the crystal oscillator is starting up), the output clock is
maintained at a stable active low or high phase of the internal 32 kHz clock to avoid any clocking glitches. If the XTAL clock
source suddenly disappears during operation, the IC will revert back to the internal clock source. Given the unpredictable nature
of the event and the startup times involved, the clock may be absent long enough for the application to shut down during this
transition, for example, due to a sag in the switchover output voltage, or absence of a signal on the clock output pins.
A status bit, CLKS, is available to indicate to the processor which clock is currently selected: CLKS=0 when the internal RC is
used, and CLKS=1 if the XTAL source is used. The CLKI interrupt bit will be set whenever a change in the clock source occurs,
and an interrupt will be generated if the corresponding CLKM mask bit is cleared.
OSCILLATOR SPECIFICATIONS
The crystal oscillator has been designed for use in conjunction with the Micro Crystal CC7V-T1A-32.768 kHz-9pF-30 ppm or
equivalent (such as Micro Crystal CC5V-T1A or Epson FC135).
Table 15. RTC Crystal Specifications
Nominal Frequency
Make Tolerance
32.768 kHz
+/-30 ppm
-0.038 ppm /C2
80 kOhm
Temperature Stability
Series Resistance
Maximum Drive Level
Operating Drive Level
Nominal Load Capacitance
Pin-to-pin Capacitance
Aging
1.0 μW
0.25 to 0.5 μW
9.0 pF
1.4 pF
3 ppm/year
The oscillator also accepts a clock signal from an external source. This clock signal is to be applied to the XTAL1 pin, where
the signal can be DC or AC coupled. A capacitive divider can be used to adapt the source signal to the XTAL1 input levels. When
applying an external source, the XTAL2 pin is to be connected to VCOREDIG.
The electrical characteristics of the 32 kHz Crystal oscillator are given in the table below, taking into account the above crystal
characteristics
13892
Analog Integrated Circuit Device Data
50
Freescale Semiconductor
FREESCALE [ Freescale ]
