ELECTRICAL CHARACTERISTICS
TIMING DIAGRAMS
TIMING DIAGRAMS
IN[0:3]
high logic level
low logic level
Time
Time
Time
or
CS
high logic level
low logic level
VHS[0:3]
V
PWR
R
PWM
50%V
PWR
tDLY(OFF)
tDLY(ON)
VHS[0:3]
70% V
PWR
SRF
SRR
30% V
PWR
Time
Figure 4. Output Slew Rate and Time Delays
I
OCH1
I
I
OCH2
OC1
OC2
Load
Current
I
I
I
OC3
OC4
I
I
I
OCLO4
OCLO3
OCLO2
I
OCLO1
Time
t
t
t
t
OC7
OC3
OC1
t
OC5
t
OC6
t
OC4
OC2
Figure 5. Over-current Shutdown Protection
10XS3412
Analog Integrated Circuit Device Data
Freescale Semiconductor
20