F81866A
6. Function Description
6.1 Power on Strapping Option
The F81866A provides eight pins for power on hardware strapping to select required functions. See
below table for the detail:
Pin No.
Symbol
Value
Description
Disable (default): internal pull high 47k Ω . Voltage
protection function is enabled via setting the related
registers.
1
4
OVP_Mode
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Enable OVP function.
ATX mode (default, internal pull high 47kΩ).
AT mode.
69
ATX_AT_TRAP
PWM_DAC1
PWM_DAC2
PWM_DAC3
FAN40_100
Config4E_2E
I2C_ADDR
PWM mode.
99
DAC mode (default, internal pull down 100k Ω )
PWM mode.
101
103
123
124
126
DAC mode (default, internal pull down 100k Ω )
PWM mode.
DAC mode (default, internal pull down 100k Ω )
Power on fan speed default duty is 40%. ( Default)
Power on fan speed default duty is 100%.
Configuration Register I/O port is 4E/4F. (Default)
Configuration Register I/O port is 2E/2F.
The I2C slave address is 0X5C (Default)
The I2C slave address is 0X5A
6.2 FDC
The Floppy Disk Controller provides the interface between a host processor and one floppy disk drive. It
integrates a controller and a digital data separator with write pre-compensation, data rate selection logic,
microprocessor interface, and a set of registers. The FDC supports data transfer rates of 250 Kbps, 300 Kbps,
500 Kbps, 1 Mbps and 2 Mbps. It operates in PC/AT mode.
The FDC configuration is handled by software and a set of Configuration registers. Status, Data, and
Control registers facilitate the interface between the host microprocessor and the disk drive, providing
information about the condition and/or state of the FDC. These configuration registers can select the data rate,
enable interrupts, drives, and DMA modes, and indicate errors in the data or operation of the FDC/FDD.
28
Jan, 2012
V0. 12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
