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F81867D 参数 Datasheet PDF下载

F81867D图片预览
型号: F81867D
PDF下载: 下载PDF文件 查看货源
内容描述: 6个UART μSuper IO 128字节FIFO和省电功能 [6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions]
分类和应用: 先进先出芯片
文件页数/大小: 315 页 / 2394 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F81867  
PECI Master DATA4 Register Offset 47h  
Bit  
Name  
R/W Reset Default  
Description  
For GetDIB() , this byte represents “Device Info”  
For GetTemp(), this byte represents the least significant byte of  
temperature.  
For RdIAMSR() and RdPkgConfig() , this byte is “Completion  
Code”.  
7-0  
PECI_DATA4  
R/W 5VSB  
0
For WrPkgConfig(), this byte represents “DATA[7:0]”  
PECI Master DATA5 Register Offset 48h  
Bit  
Name  
R/W Reset Default  
Description  
For GetDIB() , this byte represents “Revision Number”  
For GetTemp(), this byte represents the most significant byte of  
temperature.  
For RdIAMSR() and RdPkgConfig() , this byte represents  
“DATA[7:0]”  
7-0  
PECI_DATA5  
R/W  
5VSB  
0
For WrPkgConfig(), this byte represents “DATA[15:8]”  
PECI Master DATA6 Register Offset 49h  
Bit  
Name  
R/W Reset Default  
Description  
For RdIAMSR() and RdPkgConfig() , this byte represents  
“DATA[15:8]”.  
7-0  
PECI_DATA6  
R/W  
5VSB  
0
For WrPkgConfig(), this byte represents “DATA[23:16]”  
PECI Master DATA7 Register Offset 4Ah  
Bit  
Name  
R/W Reset Default  
Description  
For RdIAMSR() and RdPkgConfig() , this byte represents  
“DATA[23:16]”.  
7-0  
PECI_DATA7  
R/W 5VSB  
0
For WrPkgConfig(), this byte represents “DATA[31:24]”  
PECI Master DATA8 Register Offset 4Bh  
Bit  
Name  
R/W Reset Default  
Description  
For RdIAMSR() and RdPkgConfig() , this byte represents  
“DATA[31:24]”.  
7-0  
PECI_DATA8  
R/W 5VSB  
0
For WrPkgConfig(), this byte represents “AW FCS”  
PECI Master DATA9 Register Offset 4Ch  
Bit  
Name  
R/W Reset Default  
Description  
For RdIAMSR(), this byte represents “DATA[39:32]”.  
For WrPkgConfig(), this byte represents “Completion Code”  
7-0  
PECI_DATA9  
R/W  
5VSB  
0
PECI Master DATA10 Register Offset 4Dh  
Bit  
Name  
R/W Reset Default  
R/W 5VSB  
Description  
7-0  
PECI_DATA10  
0
For RdIAMSR(), this byte represents “DATA[47:40]”.  
226  
Dec, 2011  
V0.12P  
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