欢迎访问ic37.com |
会员登录 免费注册
发布采购

F81867D 参数 Datasheet PDF下载

F81867D图片预览
型号: F81867D
PDF下载: 下载PDF文件 查看货源
内容描述: 6个UART μSuper IO 128字节FIFO和省电功能 [6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions]
分类和应用: 先进先出芯片
文件页数/大小: 315 页 / 2394 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
 浏览型号F81867D的Datasheet PDF文件第167页浏览型号F81867D的Datasheet PDF文件第168页浏览型号F81867D的Datasheet PDF文件第169页浏览型号F81867D的Datasheet PDF文件第170页浏览型号F81867D的Datasheet PDF文件第172页浏览型号F81867D的Datasheet PDF文件第173页浏览型号F81867D的Datasheet PDF文件第174页浏览型号F81867D的Datasheet PDF文件第175页  
F81867  
GPIO8 Make Code 7 Register Index DFh  
Name R/W Reset Default  
Bit  
Description  
This byte is used to assert the make code when the scan code event 0 is  
occurred. The scan code events will set KBC OBF and put their make/break  
code into the KBC output buffer. The break code is make code + 0x80 and  
this function is implemented by μC. The source of event is GPIO87.  
7-0 GP_MAKE_CODE7 R/W 5VSB  
0
GPIO8 Pre-Code 0 Register Index C8h  
Name R/W Reset Default  
Bit  
Description  
This byte is used to assert the pre-code before the make/break code when it  
is enabled.  
7-0  
GP_PRE_CODE0 R/W 5VSB  
0xE0  
GPIO8 Pre-Code 1 Register Index C9h  
Name R/W Reset Default  
Bit  
Description  
This byte is used to assert the pre-code before the make/break code when it  
is enabled.  
7-0  
GP_PRE_CODE1 R/W 5VSB  
0xE0  
GPIO8 Pre-Code 2 Register Index CAh  
Name R/W Reset Default  
Bit  
Description  
This byte is used to assert the pre-code before the make/break code when it  
is enabled.  
7-0  
GP_PRE_CODE2 R/W 5VSB  
0xE0  
GPIO8 Pre-Code 3 Register Index CBh  
Name R/W Reset Default  
Bit  
Description  
This byte is used to assert the pre-code before the make/break code when it  
is enabled.  
7-0  
GP_PRE_CODE3 R/W 5VSB  
0xE0  
GPIO8 Pre-Code 4 Register Index CCh  
Name R/W Reset Default  
Bit  
Description  
This byte is used to assert the pre-code before the make/break code when it  
is enabled.  
7-0  
GP_PRE_CODE4 R/W 5VSB  
0xE0  
GPIO8 Pre-Code 5 Register Index CDh  
Name R/W Reset Default  
Bit  
Description  
This byte is used to assert the pre-code before the make/break code when it  
is enabled.  
7-0  
GP_PRE_CODE5 R/W 5VSB  
0xE0  
GPIO8 Pre-Code 6 Register Index CEh  
Name R/W Reset Default  
Bit  
Description  
This byte is used to assert the pre-code before the make/break code when it  
is enabled.  
7-0  
GP_PRE_CODE6 R/W 5VSB  
0xE0  
GPIO8 Pre-Code 7 Register Index CFh  
Name R/W Reset Default  
Bit  
Description  
This byte is used to assert the pre-code before the make/break code when it  
is enabled.  
7-0  
GP_PRE_CODE7 R/W 5VSB  
0xE0  
171  
Dec, 2011  
V0.12P  
 复制成功!