F81867
0: GPIO81 is open drain in output mode.
1: GPIO81 is push pull in output mode.
1
0
GPIO81_DRV_EN R/W LRESET#
GPIO80_DRV_EN R/W LRESET#
0
0
0: GPIO80 is open drain in output mode.
1: GPIO80 is push pull in output mode.
GPIO8 SMI Enable Register ⎯ Index 8Eh
Bit
Name
R/W Reset Default
Description
0: Disable SMI event.
7
GPIO87_SMI_EN
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
0
0
0
0
0
0
0
0
1: Enable SMI event via PME# or SIRQ if GPIO87_SMI_ST is set.
0: Disable SMI event.
6
5
4
3
2
1
0
GPIO86_SMI_EN
GPIO85_SMI_EN
GPIO84_SMI_EN
GPIO83_SMI_EN
GPIO82_SMI_EN
GPIO81_SMI_EN
GPIO80_SMI_EN
1: Enable SMI event via PME# or SIRQ if GPIO86_SMI_ST is set.
0: Disable SMI event.
1: Enable SMI event via PME# or SIRQ if GPIO85_SMI_ST is set.
0: Disable SMI event.
1: Enable SMI event via PME# or SIRQ if GPIO84_SMI_ST is set.
0: Disable SMI event.
1: Enable SMI event via PME# or SIRQ if GPIO83_SMI_ST is set.
0: Disable SMI event.
1: Enable SMI event via PME# or SIRQ if GPIO82_SMI_ST is set.
0: Disable SMI event.
1: Enable SMI event via PME# or SIRQ if GPIO81_SMI_ST is set.
0: Disable SMI event.
1: Enable SMI event via PME# or SIRQ if GPIO80_SMI_ST is set.
GPIO8 SMI Status Register ⎯ Index 8Fh
Bit
Name
R/W Reset Default
Description
0: No SMI event.
7
GPIO87_SMI_ST
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
R/W LRESET#
0
0
0
0
0
0
1: A SMI event will set if GPIO87 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
6
5
4
3
2
GPIO86_SMI_ST
GPIO85_SMI_ST
GPIO84_SMI_ST
GPIO83_SMI_ST
GPIO82_SMI_ST
1: A SMI event will set if GPIO86 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
1: A SMI event will set if GPIO85 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
1: A SMI event will set if GPIO84 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
1: A SMI event will set if GPIO83 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
1: A SMI event will set if GPIO82 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
168
Dec, 2011
V0.12P
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
