10. Application Circuit
(Power On Setting Pin)
VCC3V
RTS1#
DTR1#
SOUT1
RI1#
CTS1#
DSR1#
SIN1
R2
R3
R4
R5
R6
R7
R8
R9
R10 R11
4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K
DCD1#
IRRX
IRTX
PIN_38
PIN_37
R12 R13 R14 R15 R16 R17 R18 R19 R20 R21
VCC3V
DCD2#
SIN2
1k
1k
1k
1k
1k
1k
1k
1k
1k
1k
DSR2#
CTS2#
RI2#
U1
R1
4.7K
SOUT2
DTR2#
RTS2#
R2 on and R12 off: UART
R5 on and R15 off: UART
R8 on and R18 off: UART
4
3
addr:0x2e8 IRQ9; off:UART
addr:0x3e8 IRQ5; off:UART
4
3
disabled.
disabled.
PIN_1
PIN_2
PIN_36
PIN_35
PIN_34
PIN_33
PIN_32
PIN_31
PIN_30
1
2
3
4
5
6
7
8
9
36
35
34
33
32
31
30
29
28
27
26
25
PCIRST#
WDT_OUT#
PCIRST#
WDT_OUT#
GND
LAD3
LAD2
LAD1
LAD0
LCLK
SOUT2
SIN2
DTR2#
RTS2#
DSR2#
CTS2#
VCC
GND
RI3#
DCD3#
SOUT3
SIN3
PIN_3
PIN_4
PIN_5
PIN_6
PIN_7
PIN_8
PIN_9
PIN_10
2 addr:0x2f8 irq4; R7 on, R17 off and R8 off, R18
LAD3
LAD2
LAD1
on
: UART 2 addr:0x2e0 IRQ4; R7 off, R17 on and R8 off, R18 on:UART 2
VCC3V
disabled.
F81216D
LAD0
PIN_29
PCICLK
LFRAME#
SERIRQ
PIN_28
PIN_27
PIN_26
PIN_25
R11 on and R21 off: UART
1
addr:0x3f8 irq3; R10 on, R20 off and R11 off, R21
LFRAM#
SERIRQ
VCC
10
11
12
on: UART
1
addr:0x3e0 IRQ3; R10 off, R20 on and R11 off, R21 on:UART
1
PIN_11
disabled.
VCC3V
PIN_12
CLK24IN
CLKIN
C1
0.1U
R4 on and R14 off: Watch Dog Timer enabled and setting to 10 second when the
clock input is 24Mhz. If the clock input is 48Mhz the timer is setting to
C2
,
0.1U
5
second.
off :disabled.
R16 is
R13 is
R19 is
0
0
0
when R6=1, R16 is
when R3=1, R13 is
when R9=1, R19 is
1
1
1
when R6=0.
when R3=0.
when R9=0.
R6
0
R3
0
R9
Address
Entry Key
0x77
On:1
DCD3#
SIN3
DSR3#
CTS3#
RI3#
SOUT3
DTR3#
RTS3#
RTS4#
DTR4#
SOUT4
RI4#
CTS4#
DSR4#
SIN4
0
1
0
1
0
1
0
1
0x4e/0x4f
0x2e/0x2f
0x4e/0x4f
0x2e/0x2f
0x4e/0x4f
0x2e/0x2f
0x4e/0x4f
0x2e/0x2f
Off:0
0
0
0x77
DCD4#
0
1
0xa0
0
1
0xa0
1
0
0x87
1
0
0x87
1
1
0x67
1
1
0x67
Title
Feature Integration Technology Inc.
Size
B
Document Number
F81216D
Rev
0.21
Date:
Tuesday , January 10, 2006
Sheet
1
of
2
FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
