(b) Serial bus write to internal address register only
0
0
7
8
0
7
8
SCL
SDA
1
0
1
1
0
1
R/W
D7
D6
D5
D4
D3
D2
D1
D0
Start By
Master
Ack
by
101R
Stop by
Master
Ack
by
121R
Frame 1
Serial Bus Address Byte
Frame 2
Internal Index Register Byte
0
Figure 2. Serial Bus Write to Internal Address Register Only
(c) Serial bus read from a register with the internal address register prefer to desired location
0
7
8
0
7
8
SCL
SDA
0
1
0
1
1
0
1
R/W
D7
D6
D5
D4
D3
D2
D1
D0
Start By
Master
Ack
by
Master
Ack
by
121R
Stop by
Master
Frame 1
Serial Bus Address Byte
Frame 2
Internal Index Register Byte
0
Figure 3. Serial Bus Read from Internal Address Register
6.4 VID Function
Please refer to control registers.
6.5 GPIO Function
The GPIO functions in the F75121 include general GPIO with programming Input and output. The output function also can be
programmed high level or low level or high pulse or low pulse.
CPU Voltage ID (VID) function
The F75121 provides a voltage adjustment in the CPU with VID control. In general, the VIDIN is connected to CPU
VID<4:0>(VRM9.X) or VID<5:0>(VRM10.0) and VIDOUT is connected to PWM Vcore VID. In the first power-on, the VIDIN is
bypassed to VIDOUT.
6.5.1 General GPIO Function
Please refer to control registers.
- 9 -
July, 2007
V0.24P