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F75111R 参数 Datasheet PDF下载

F75111R图片预览
型号: F75111R
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗GPIO数据表 [Low Power GPIO Datasheet]
分类和应用:
文件页数/大小: 45 页 / 967 K
品牌: FINTEK [ FEATURE INTEGRATION TECHNOLOGY INC. ]
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F75111  
input mode [CR10] will enable GPIO17 edge detection. Default is  
disable  
6
5
4
3
2
1
0
EN_GP16EDGE  
EN_GP15EDGE  
EN_GP14EDGE  
EN_GP13EDGE  
EN_GP12EDGE  
EN_GP11EDGE  
EN_GP10EDGE  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
VSB3V Enable GPIO16 Edge Detector. If this bit set to 1 and GPIO16 set to  
input mode [CR10] will enable GPIO16 edge detection. Default is  
disable  
VSB3V Enable GPIO15 Edge Detector. If this bit set to 1 and GPIO15 set to  
input mode [CR10] will enable GPIO15 edge detection. Default is  
disable  
VSB3V Enable GPIO14 Edge Detector. If this bit set to 1 and GPIO14 set to  
input mode [CR10] will enable GPIO14 edge detection. Default is  
disable  
VSB3V Enable GPIO13 Edge Detector. If this bit set to 1 and GPIO13 set to  
input mode [CR10] will enable GPIO13 edge detection. Default is  
disable  
VSB3V Enable GPIO12 Edge Detector. If this bit set to 1 and GPIO12 set to  
input mode [CR10] will enable GPIO12 edge detection. Default is  
disable. If this bit serves as IRQ/SMI#, this bit has no effect.  
VSB3V Enable GPIO11 Edge Detector. If this bit set to 1 and GPIO11 set to  
input mode [CR10] will enable GPIO11 edge detection. Default is  
disable  
VSB3V Enable GPIO10 Edge Detector. If this bit set to 1 and GPIO10 set to  
input mode [CR10] will enable GPIO10 edge detection. Default is  
disable  
7.19 GP1X Edge Detector Status Register – Index 0x19  
Power-on default [7:0] =0000_0000b  
Bit  
Name  
STS_GP17ED  
GE  
R/W  
PWR  
Description  
7
RW  
VSB3V Indicate GPIO17 Edge Status. If set to 1, the edge of GPIO17 has  
occurred. Writing 1 will clear this bit to 0. Writing 0 is invalid.  
6
5
4
STS_GP16ED  
GE  
RW  
RW  
RW  
VSB3V Indicate GPIO16 Edge Status. If set to 1, the edge of GPIO16 has  
occurred. Writing 1 will clear this bit to 0. Writing 0 is invalid.  
STS_GP15ED  
GE  
VSB3V Indicate GPIO15 Edge Status. If set to 1, the edge of GPIO15 has  
occurred. Writing 1 will clear this bit to 0. Writing 0 is invalid.  
STS_GP14ED  
GE  
VSB3V Indicate GPIO14 Edge Status. If set to 1, the edge of GPIO14 has  
occurred. Writing 1 will clear this bit to 0. Writing 0 is invalid.  
- 20 -  
July, 2007  
V0.27P  
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